ADS1299: DRDY Always Pulled High and DOUT does not respond to read commands

Hi Tom, 

I've attached an image of the ADS breakout we created. The SPI connection we have connects SCLK on both the NRF52. MISO is connected to DOUT, MOSI is connected to DIN, both boards are grounded together but are currently running on separate power supplies. The reset pin is just a digital IO on the NRF. I've attached a snippet of the SPI startup code below. Please let me know if this is sufficient. We are using a created SPI library that works in the Arduino IDE connecting to the NRF. All other pins such as chip select, start, data ready, and clksel are attached to DigIO pins.

//PowerUP Sequence
delay(10); //Need to wait a bit for power supply to let signals stabilize
digitalWrite(CLOCK_SELECT,HIGH);
digitalWrite(ADS_POWER_ON,HIGH);
digitalWrite(ADS_RESET, HIGH);
delay(150); //wait at least 128 ms to let stabilize

//RESET Pulse
digitalWrite(ADS_RESET, LOW);
delayMicroseconds(15);
digitalWrite(ADS_RESET, HIGH);
delay(150); //need to wait at least 9us to start operating
//double check RC-cap to see if this needs to be longer

digitalWrite(CHIP_SELECT, LOW);
//Stop Continuous data mode
SPI.transfer(0x11);

//Initialize ADS

//write config 1/2/3 registers
SPI.transfer(0x43); //write 3 registers
SPI.transfer(0x01); //starting at address 1
SPI.transfer(0b11010010); //specifies multiple readback mode, clock output disabled, and sampling frequency of 4kHz
SPI.transfer(0b11000001); //specifies external signals at 1x amplitude and fclk/2^20 frequency - NEED TO VERIFY
SPI.transfer(0b01100000); //specifies close internal buffer
delayMicroseconds(5); //wait a couple clock cycles for internal reference to settle

Hey Tom,

I'll provide you with a schematic later today. This is a two layer board with one circuit layer and one ground layer. Power goes direct to the relevant pins.

Hey Tom, Sorry for the delay, here is a copy of the schematic.

Hey Tom, 

Both C11 and C13 are tied to vias leading to the ground plane @ 0V. On the schematic they are in the bottom left tied from 3v3 and VDD to 0V respectively.

Hey Tom, no I am unable to read anything off the registers. I can use the oscilloscope to see the correct command being sent, but there is nothing returned on the DOUT pin.

VCAP1-4 are respectively, 2.5,1.2,3.9,0.4. We have -2.5V connected to VSS as we are running a bipolar setup. The grounds are tied together so that the reference is correct.

Here is a picture of the Scope (I only have two channels on this one). One channel here is the Serial Clock and the top is the DIN pin. I am sending 0xAA which is the SDATAC command and there is no effect. DRDY remains high at 3.28V and DOUT remains low even with a read register command.

Thanks Thomas,

Please change the phase on your SPI settings, the data into the device should be valid on a falling SCLK edge, not rising. See Figure 1 on page 12 - CPOL = 0, CPHA = 1 is the setting you should be using (SPI mode 1). Let us know if that resolves the issues.

Hi Tom,

This has not resolved the issue. A point to make is that VCAP1 is 1.2V with respect to AVSS (-2.5V), but not with respect to ground. Is this potentially causing issues?

Hey Tom,

Glad to hear. CS, RESET, and PWDN are all controlled by GPIOs on the NRF52832.

Hey Tom,

CLKSEL is just tied high for now from the GPIO from the NRF with the plan to tie it directly to 3.3V in the future. The NRF outputs are attached below from the spec sheet, but I am observing about ~0.2V for OL and 3.3V for OH.

For normal operation, START, /PWDN, CLKSEL, and /RESET are all pulled high. As I mentioned before I have followed the startup procedure detailed in the data sheet to appropriately toggle those pins differently during the startup phase.