DLPDLCR230NPEVM: In 960x540@240hz,

Hi Kei,

This appears to be an issue with the FPGA's VSYNC misaligning with the video data for the DLPC. You can add a command to the DLPC343x API to resolve the issue. Please follow these steps to resolve:

1. Go to python support code folder and open  \api\dlpc343x_xpr4.py

$ sudo nano <location>\api\dlpc343x_xpr4.py

2. Scroll to the bottom of the file, and add this function to end of the file;

def WriteXprFpgaRegister(Address, Data):
    "Writes to XPR FPGA Register"
    global Summary
    Summary.Command = "Write Fpga Register"
    Summary.Successful = True
    global ProtocolData
    ProtocolData.CommandDestination = 0;
    try:
        writebytes=list(struct.pack('B',238))   #238 = 0xEE (write to FPGA)
        ProtocolData.OpcodeLength = 1;
        writebytes.extend(list(struct.pack('L',Address)))
        writebytes.extend(list(struct.pack('L',Data)))
        _writecommand(writebytes, ProtocolData)
    except ValueError as ve:
        print("Exception Occurred ", ve)
        Summary.Successful == False
    finally:
        return Summary

This function will allow you to include this i2c command in your python scripting. In this case, we will be changing the FPGA's FSYNC value that will pull the FSYNC pulse to be aligned better with video data.

3. In your init_parallel_input.py script, add this command right before disabling the black image curtain:

Summary = WriteXprFpgaRegister(0x508, 0x1B58)

Depending on the video data timings, you may need to adjust the data value to be smaller or larger. 

Thank you,

Chris