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Original question:

SN75DP130: 10% of parts in production fail to initiate video after power up

SN75DP130: SN75DP130: 10% of parts in production fail to initiate video after power up

Akiva Naiman
Prodigy 10 points
Part Number: SN75DP130
Other Parts Discussed in Thread: TPS54325

Regarding this intermittent issue with some SN75DP130 devices not always detecting a DP monitor asserting HPD_SINK high before the   SN75DP130 +3.3v power is stable because flip flops inside the DP130 HPD controller can initialize to a wrong state -

Is there a possible software work around solution for this issue? The DP130 data sheet indicates that by default, it automatically goes into Standby mode to conserve power if the HPD_SNK signal goes low for longer than 2 msec.  So does this intermittent issue with the HPD controller flip-flops initializing to the wrong state only occur when the DP130 is in the Standby mode? Or can incorrect HPD controller flip-flop initialization also occur in the non-Standby modes as well?  We would pursue disabling Standby mode (by setting AUTO_POWERDOWN_DISABLE in I2C Control Register offset 01h to a "1") if that will prevent this issue of the DP130 not always detecting the powered up monitor asserting the HPD_SNK signal high.  Thanks.

  • 0
    TI__Guru*** 149845 points

    Hi,

    Unfortunately there is no software workaround. The HPD_SNK needs to come up after the RSTn has been released. This is to ensure the internal digital gets stable power first.

    Thanks

    David

  • 0 in reply to David (ASIC) Liu
    Prodigy 30 points

    Hi David,

       We have another question on this topic.  Akiva found that our design does not comply with the SN75DP130 Power Supply Recommendations regarding the power-up sequence.  In our design, on power-up, Vcc is applied before Vddd.  Power is coming from a pair of TPS54325 buck converters.  I changed the soft start capacitors so that the Vddd power-up occurs before the Vcc power-up.  After doing this, a board that was failing to output video an average of 9 out of 10 power-up cycles correctly provided video on 10 consecutive power-up cycles.  Now we are curious if only changing the power-up sequence would be an adequate fix to correct the issue of the DP130 registers not always initializing correctly with a powered monitor.  Will it still be possible for the DP130 registers to initialize incorrectly if the power supply sequencing is fixed?  Please advise us on whether it is advisable to still prevent the HPD_SNK from being powered before the chip is powered and reset is released if we fix the power-up sequence.  I think we should fix the power sequencing either way but would like confirmation on that too.

    Best Regards,

    Kennon

  • 0 in reply to Kennon Conrad
    TI__Guru 64326 points

    Hi,
    Your issue is being reviewed by the appropriate engineer. Due to the New Years Holiday there may be a delay in response to your post. We apologize for any inconvenience.

  • 0 in reply to Malik Barton57
    TI__Guru*** 149845 points

    Hi,

    You would need to follow the power sequence in the DP130 datasheet. Please give me couple days to confirm with our design team whether HPD_SNK requirement still applies if the proper power sequence is being followed.

    Thanks

    David 

  • 0 in reply to David (ASIC) Liu
    Prodigy 30 points

    Hi David,

       Have you been able to confirm whether the HPD_SNK requirement still applies?

    Thanks,

    Kennon

  • 0 in reply to Kennon Conrad
    TI__Guru*** 149845 points

    Kennon

    Sorry for the delay on this issue, I checked with the design team and we still wants the HDP_SNK to be hold low even with VDD powers up before VCC.

    Thanks

    David