HD3SS3220: When use as UFP port, how should TX and RX connect with CPU and USB device?

Ruixin Feng

Intellectual 1965 points

Part Number: HD3SS3220
Other Parts Discussed in Thread: TIDA-00891,

In TIDA-00891, connection as below; USB_TXN connect with SSRXN

but in datasheet, the connection as below, TXN connect with SSTXN.

May I know which is right? Which should follow?

Thanks!

Rayna

over 2 years ago

0 David (ASIC) Liu over 2 years ago

TI__Guru**** 154611 points

Rayna

Both are correct. The HD3SS3220 is a passive switch, so it is possible to swap its TX & RX pins, you only have to care about the appropriate routing direction between the HOST and the connector.

Thanks

David

0 Ruixin Feng over 2 years ago in reply to David (ASIC) Liu

TI__Intellectual 1965 points

Hi David,

Thanks for your reply~

I want to understand the internal connection of the MUX in HD3SS3220.

How TX and RX internally connect with TX1,RX1,TX2,RX2?

Does Tx connect with TX1 and TX2 and RX connect with RX1,RX2 or TX connect with RX1,RX2 and RX connect with TX1,TX2?

Besides, Could you pls help to review the schematics as attached? If any mistake in sch, pls figure them out. Thanks a lot!

XCZU4CG&HD3SS3220_UFP schematic.pdf

0 David (ASIC) Liu over 2 years ago in reply to Ruixin Feng

TI__Guru**** 154611 points

Hi,

Is this a UFP or a DFP design?

For the Current Mode pin, L – Low - Default – 900 mA M - Medium (Install 500 K to VDD5 on the PCB) – 1.5 A H - High (Install 10 K to VDD5 on the PCB) – 3 A.
Pull DIR to VCC5V through a 200k resistor
Pull VCONNT to VCC5V through a 200k resistor
Do not populate the 100k pulldown on TX and RX

USB org defines the TX1/TX2 to be transmitter and RX1/RX2 to be receiver, For the FPGA, is GT3_USB1_SSTX_P/N transmitter or receiver?

Thanks

David