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DP83TC812S-Q1: Enable RX_DV in RMII mode instead off CRS_DV

Part Number: DP83TC812S-Q1
Other Parts Discussed in Thread: DP83848K

We are using the above PHY(PHY1) in a back to back configuration with a DP83848K(PHY2). Currently we use the CRS_DV from PHY1 to control the TX_EN of PHY2. Because the CRS_DV is not in sync with the start of the dataframe, we are loosing packets. To fix this we would need to use the RX_DV signal instead of the CRS_DV signal. The datasheet clearly shows this possibility on page 52, Figure 8-15.

I suppose there should be a parameter to configure this in one of the SMI-registers. I was not able to find that parameter though.

Were can I find the configuration bit or pin strap to change from CRS_DV to RX_DV in RMII mode?

Thanks in advance!

  • Hi andre,

    We will discuss this internally and provide you a response later this week.

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    Regards,

    Hillman Lin

  • Hi Andre,

    You can enable the RX_DV in RMII mode by changing the register 0x0551 bit [4] from 1 to 0. Please let me know if this works for you.

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    Regards,

    Hillman Lin

  • Hi Lin,

    Thanks for your message. I have read back the register 0x0551 using SMI. The default value in this register(which can not be found in the datasheet) is 0x010B, which means bit 4 is already cleared.

    Regards,

    André

  • Hi Andre,

    Could you read the register 0551 value again with extended register. Because the default value for 0551 register is 0010 and you are getting 010B.

    • Make sure to have an extended register when you are writing the registers:
    • write procedure for MMD "1F" registers:
      write reg<000D> = 0x001F
      write reg<000E> = <address>
      write reg<000D> = 0x401F
      write reg<000E> = <value>
      read procedure for MMD "1F" registers:
      write reg<000D> = 0x001F
      write reg<000E> = <address>
      write reg<000D> = 0x401F
      read reg<000E>
      Note : To read/write MMD "1" registers, replace 1F with 01.
      Note : Above write and read procedure is normally used for registers with address greater than 0x001F. But it can also be used for any address in general.

    --

    Regards,

    Hillman Lin

  • Hi Lin,

    I must have made a mistake while debugging last time. I now cleared bit 4 in reg 0x551 and the PHY outputs RX_DV.

    Thanks a lot for your help.

    Regards,

    André