TMUXHS4212: RSVD Pins - purpose and recent datasheet change to require them to be connected to VCC

Travis:

      RSVD pin floating should not burn the device. We recommend to pullup RSVD pin to Vcc just to avoid entering test mode. Did it happen jus on one device or more?

Regards

brian

Brian:

Thanks for the follow up and the clarification for the RSVD pins.

We had 3 out of 4 devices exhibit this behavior in an overnight test, and some of those boards exhibited the behavior again after a replacement of the part (2 out of 3) during another test.

Thanks,
Travis

wow, can you send the bad device to us for further analysis?

Regards

brian

We've submitted a Tech Query related to this issue with some more detail (Case CS1135035 has been Updated - Tech Query). Let us know if there is something further we can do expediate things from our side.

Thanks,
Travis

yes, it's the right way to submit tech query.

Regards

brian

Brian:

Did this tech query get direct towards you? The response we got through that query was to direct us back to the forums. How can we provide more information/debugging or get chips sent over for possible evaluation?

Thanks,
Travis

Normally tech query does not get direct towards us, let  me check an feed back to you soon.

Regards

brian

Brian,

Thanks for your responses. We've commented on the case to keep it open. Let us know if you suggest anything further or have any updates.

Thanks,
Travis

Travis:

   Can you find TI local FQE for quality issue? If not, pls send unit directly to BU for help.

Regards

Brian

Hi Brian, we are Travis' client with this problem.  Further failures have consistently shown that Vcc gets shorted to ground internal to the TMUXHS4212.  We replace the TMUX chip and it all works again.  But some less catastrophic failures show that Vcc on pin 6 becomes shorted internal to the chip to pin 7, which is the A1p pin being used as the host RX signal.  That signal has common mode voltage at zero since the series capacitor is on the end device plugged into the miniPCIE socket per your datasheet Figure 9-1 configuration (a).  We at first thought it might be the startup sequence where the host powers up first then powers up the peripheral circuits including the TMUX.  But power sequence experiments have not been able to reproduce the failure.  We are concerned that the TMUX has an absolute min voltage of -0.5v and with common mode voltage at zero (series capacitor isolated), any transients on the host RX signal path might exceed that negative absolute limit.  However, our scope plots do not show any transients below about -200mV.  What information would be of help here, clips of the schematic, or overall architecture diagram?

Thanks a lot,

Don

A1p is directly connected to host and not facing PCIe connector, right? is thermal pad ground ok? behavior looks weird.

Regards

Brian

Yes, A1p and A1n are directly connected to the host microprocessor through a microprocessor module connector.  A1n and A1p are swapped relative to the host for layout convenience as allowed by the datasheet.  The host is a 200-pin Variscite system on module model number VAR-SOM-MX8M-MINI.  The TMUX thermal pad is soldered to the motherboard ground per the the attached layout.

Don:

     layout looks fine. What kind test performed which caused mux failure, power cycling?

Regards

Brian

No, running continuously overnight is when they failed.  We're looking into the possibility that a liquid flux left on the board may have become conductive after heat from soldering. 

ok, make sense.

FYI, there appears to be some kind of galvanic action between left over liquid flux (Kester 2331-ZX Flux-Pen) and the metals, and only on the Vcc pin.  We thought the trace was burned away from excessive current flow, but this happens overnight when the circuit is operating normally and the liquid flux is left puddled around the part.  This has been repeated on half a dozen boards and finally on a test run of two more parts, one part at a different board location.  We are trying to reach Kester for advice.

Thanks for the updates.