TLIN1021A-Q1: Voltage drop INH

Thomas,

While the following information is not specifically qualified in the data sheet, my own empirical observations have been that the terminal generally follows a ~200 Ω drop from VSUP. Of course this can vary a bit as environmental conditions differ, but the general behavior is that for low current consumption, the forward voltage of the INH driver is the larger factor (generally given by the V_H spec), but then after this, the effective resistance is most prominent.

Best,

Danny

Thomas,

Thomas Hirschligau said:

Do you have a chart where we can find RDS,on over temperature?

Unfortunately I don't have this put together across temperature. These sort of observations are what I've put together in the context of bench testing. It's also not something that TI has specified as a characteristic for the device.

In general, as temperature rises, the effective resistance of FETs increases, so you might see some slightly increased voltage drop at higher temperatures.

Thomas Hirschligau said:

And for lower current, as mentioned in the datasheet (0.5 mA), the voltage drop will be up to 1 V - correct?

Yes, and note that this is true across process, voltage, and temperature for this I/V relationship. Meaning, the 1 V max is the worst-case highest for any device at any temperature or supply when sinking 0.5 mA.

Best,

Danny

Thomas,

Thomas Hirschligau said:

Under worst-case condition our application sinks a current of 1 mA out of INH pin. I would like to check, if this is within TI's product specification and what is the maximum voltage drop. 

Unfortunately we don't have this as a specification in the sense of a committed data sheet characteristic. However, a worst-case overestimate might work here.

Knowing that the voltage drop is effectively the sum of some static offset and some linear offset, we can take the worst-case assumption that all of the voltage offset is linear and none is static. Thus, in this situation, -1 mA would produce double the voltage drop as -0.5 mA (spec'd as max 1 V), thus we could assume 2 V here. In reality, the 1 V spec given is actually the combination of some static characteristic as well, thus the linear component is lower, and also the 1 V would likely never actually be observed at -0.5 mA.

Hopefully an estimate of 2 V at 1 mA works for your application. In reality, my in-application/bench measurements never shown more than 250 mV drop at 1 mA draw, at least at room temperature.

Thomas Hirschligau said:

The absolute maximum rating of Inhibit Output Current is 4 mA. Is it limited by the internal MOSFET? Up to which temperature is this valid?

The absolute maximum rating is a combination of factors usually determined by internal design structure, in this case the channel between VSUP and INH. In our data sheets, absolute maximum ratings are valid across all ranges of temperature and supply voltage.

Best,

Danny