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DS250DF410: Can DS250DF410ABMR be used for 24.33024Gbps subrate?

Part Number: DS250DF410
Other Parts Discussed in Thread: DS250DF210, DS250DF810, DS280DF810, DS250DF230

Hi team,

We are considering DS250DF410ABMR for a 24.33024Gbps interface due to the length of the PCB trace in the board(~23inches)(See Ref#1). While comparing DS250DF230 with DS250DF410, we have noticed that this datarate is specifically mentioned as one of the standard datarate in datasheet(see Ref#2 below). But, in DS250DF410 datasheet, the same is not mentioned and only a range ≥ 20.6 Gbps to ≤ 25.8 Gbps is specified(see Ref#3 below).

Additionally, in DS2x0DFxx0_SNLU182G_Programmers_Guide, the subrate mentioned as standard ones for DS250DF410 does not include 24.33024 Gbps(Table 7-6. DS280DF810, DS250DF810, DS250DF410, DS250DF210 Standard Rate Modes Configurable from Reg_0x2F). It is also mentioned that we can manually set datarate, if the range is within the VCO range(see Ref#4 below).

Queries:

1) Can we use DS250DF410 for the 24.33024 Gbps? Do we need to take care of anything in particular(configuration, CAL_CLK etc..) for doing so?

2) Any comments on the block diagram shown in Ref#1?

3) Is it preferred to go with 2 qty of DS250DF410(as shown in Ref#1)  or 3qty of DS250DF230 with 30.72MHz CAL_CLK(as shown in Ref#5) for this application? Please check and comment on Block diagram shown in Ref#5 as well. Let me know your thoughts.

Ref#1: Implementation block diagram

Ref#2: DS250DF230 datasheet mentioning about 24.33024Gbps support

Ref#3: Supported Datarate table in DS250DF410 datasheet

Ref#4: Manual datarate settings section in the DS2x0DFxx0_SNLU182G_Programmers_Guide

Ref#5: Implementation Block diagram with DS250DF230

  • Hi Jom,

    Thank you for the detailed block diagram, explanation of your system, and references.

    Regarding your questions:

    1) Can we use DS250DF410 for the 24.33024 Gbps? Do we need to take care of anything in particular(configuration, CAL_CLK etc..) for doing so?

    Yes, DS250DF410 can be used for 24.33024 Gbps NRZ.  The DS250DF410 can be set to lock any range within the data rates indicated in table 6 of the datasheet.  You will need to manually configure the CDR rate using registers 0x60-0x63.  Please see section 7.7 of the programming guide.  If you don't have the programming guide, you can request access through the link below.

    https://www.ti.com/drr/opn/DS250DF410-DESIGN

    2) Any comments on the block diagram shown in Ref#1?

    The implementation in Ref#1 looks good.

    3) Is it preferred to go with 2 qty of DS250DF410(as shown in Ref#1)  or 3qty of DS250DF230 with 30.72MHz CAL_CLK(as shown in Ref#5) for this application? Please check and comment on Block diagram shown in Ref#5 as well. Let me know your thoughts.

    The implementation in both block diagrams look good.  A couple thoughts that may factor into your decision.

    - Having separate retimers for RX and TX can allow for more layout flexibility.  If for example, the SOCs rely heavily on retimer RX, it may be preferable to place retimers close to the receiving SOC so that the retimer handles the majority of the RX equalization.

    - How does the SOC pinout affect the layout?  Will it be easier to route TX and RX as a group as shown in Ref#1, or is it easier to route each TX/RX pair together, as shown in Ref#5.

    Please let us know if you have any additional questions we can help with.

    Thanks,

    Drew