TCA9517-Q1: TCA9517-Q1 Pin A Port and B Port SCL and SDA are both high level

EDIT: I also reviewed the schematic, I don't see any issues/concerns with it.

jeno.zhang said:

1. Replace with a new device, the IIC input and output levels are normal；

After some use, do you see the issue reoccur?

jeno.zhang said:

3. Port B has three groups of Pull-up resistor. Remove any one or two groups, the IIC input and output levels are normal；

As Clemen's pointed out, you technically don't need 3 sets of pull up resistors on the bus. At the same time, I wouldn't expect this to cause any damage to the bus based on the resistor values you've displayed.

jeno.zhang said:

4. By changing the resistance value of port A or port B Pull-up resistor, for example, changing it to 11K,By changing the resistance value of port A or port B Pull-up resistor, for example, changing it to 11K,the IIC input and output levels are normal. Is there any suggestion or calculation formula for the selection of Pull-up resistor value？

As Clemen's pointed out, the 

Clemens Ladisch said:

 I²C Bus Pullup Resistor Calculation

This app note, walks through how you can size pull up resistors. 

jeno.zhang said:

The output voltages of port A and port B pins SCL and SDA are both high.

This seems like an odd occurrence because I2C is an open drain architecture. This means the issue is related to the FPGA who drives the I2C line low. This doesn't mean the root cause is the FPGA but the reason for the I2C line to remain high without traffic would be the FPGA not sending data.\

Maybe you can grab a scopeshot of the last I2C transaction before the traffic is halted/interrupted/unable to communicate.

-Bobby

Hi，

The customer still has the following questions. Please help answer them. Thanks！

1. The current design port B is connected with three groups of Pull-up resistor, all of which are 4.7k. Theoretically, the equivalent resistance is 4.7/3k.        According to the IIC Pull-up resistor calculation method（ www.ti.com/.../slva689 ）The equivalent resistance is within the calculation range. The customer's question is whether the use of three groups of Pull-up resistor on port B causes the high level output of port A and port B? 

2. What is the reason why the high level output of Port A and Port B cannot communicate properly? Is it caused by the resistance value of Pull-up resistor or three groups of Pull-up resistor?

3. By replacing with a new device, the A and B ports output normal waveforms, and the IIC communication is normal. Please help analyze the cause.

4. How are ports A and B connected internally, Why are both ports outputting high levels at the same time, and why is port A connected to an FPGA also outputting high levels？

5. According to the IIC Pull-up resistor calculation method, the value range of Pull-up resistor in fast mode is 966.66 Ω~1.77K Ω. Why is the Pull-up resistor 10k recommended in the data manual?

jeno.zhang said:

1. The current design port B is connected with three groups of Pull-up resistor, all of which are 4.7k. Theoretically, the equivalent resistance is 4.7/3k.        According to the IIC Pull-up resistor calculation method（ www.ti.com/.../slva689 ）The equivalent resistance is within the calculation range. The customer's question is whether the use of three groups of Pull-up resistor on port B causes the high level output of port A and port B?

The pull up resistors on an I2C bus affect the rise times and VoL levels on the bus. It should not stick the signal to be held to Vcc if any device on the bus tries to drive low. By definition, the pull up resistor holds the output level high but anything on the bus driving low will go low if the pull up resistors are not excessively strong.

jeno.zhang said:

2. What is the reason why the high level output of Port A and Port B cannot communicate properly? Is it caused by the resistance value of Pull-up resistor or three groups of Pull-up resistor?

The only way the pull up resistor would force the bus to a logic high is if it were sized to be very small (strong) like 200 ohms. 

jeno.zhang said:

3. By replacing with a new device, the A and B ports output normal waveforms, and the IIC communication is normal. Please help analyze the cause

Have you confirmed any damage to the device?

Are you doing any type of EMI testing or hot inserting something into the I2C bus while it's live?

jeno.zhang said:

4. How are ports A and B connected internally, Why are both ports outputting high levels at the same time, and why is port A connected to an FPGA also outputting high levels？

This device is redrives the signal, this means they do not directly connect A and B sides together. The device checks if A side is below 30% of VccA and drives a low voltage. For B side, it looks if the signal on B side goes below 0.4V to drive a low from B to A. The FPGA shows that its on A side so if the FPGA is driving it should be easier for it to send signals low from A to B.

jeno.zhang said:

5. According to the IIC Pull-up resistor calculation method, the value range of Pull-up resistor in fast mode is 966.66 Ω~1.77K Ω. Why is the Pull-up resistor 10k recommended in the data manual?

That pull up resistor range you show is really strong, this would assume you have a heavy I2C bus load with a lot of devices on the bus or are driving across cabling with a large cap load. The example image provided in the datasheet shows communication between an I2C controller and one I2C target device. The theoretical bus load would likely only be around 20pF (10pF for I2C controller/target and 10pF for A or B side of TCA9517) if we don't include PCB parasitic. When I calculate the max pull up value using 300ns and 20pF for the application image it equates to 17k pull up max. So a 10k pull up resistor would work in that typical application.

-Bobby