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DS90UH949-Q1EVM: HDMI not detected

Part Number: DS90UH949-Q1EVM
Other Parts Discussed in Thread: DS90UH949-Q1, ALP

Hi TI team,

I am using DS90UH949-Q1 EVM to implement the HDMI to FPD-Link III scheme.

The display has a DS90Ux948-Q1 deserializer, both serializer and deserializer are backward compatible as per the datasheet.

But now when I plug in the HDMI source, the ALP software shows no HDMI input, but the EVM is detected.

I have read the register values as below:

Register Data Name

0x0000 0x18 I2C Device ID

0x0001 0x00 Reset

0x0003 0xDA General Configuration

0x0004 0x80 Mode Select

0x0005 0x00 I2C Master Config

0x0006 0x00 DES ID

0x0007 0x00 SlaveID[0]

0x0008 0x00 SlaveAlias[0]

0x0009 0x00 Reserved

0x000A 0x00 Back Channel CRC Errors

0x000B 0x00 Back Channel CRC Errors

0x000C 0x00 General Status

0x000D 0x20 GPIO[0] Config

0x000E 0x00 GPIO[1] and GPIO[2] Config

0x000F 0x00 GPIO[3] Config

0x0010 0x00 GPIO[5] and GPIO[6] Config

0x0011 0x00 GPIO[7] and GPIO[8] Config

0x0012 0x00 Datapath Control

0x0013 0x88 General Purpose Control

0x0014 0x00 BIST and DOPL Control

0x0015 0x01 I2C_VSELECT

0x0016 0xFE BCC Watchdog Control

0x0017 0x1E I2C Control

0x0018 0x7F SCL High Time

0x0019 0x7F SCL Low Time

0x001A 0x01 Datapath Control 2

0x001B 0x00 BIST BC Error Count

0x001C 0x00 GPI Pin Status 1

0x001D 0x00 GPI Pin Status 2

0x001E 0x01 TX_PORT_SEL

0x001F 0xF5 Frequency Counter

0x0020 0x00 Deserializer Capabilities 1

0x0021 0x00 Deserializer Capabilities 2

0x0022 0x25 Reserved

0x0023 0x00 Reserved

0x0024 0x00 Reserved

0x0025 0x00 Reserved

0x0026 0x00 Link Detect Control

0x0027 0x00 Reserved

0x0028 0x01 Reserved

0x0029 0x20 Reserved

0x002A 0x20 Reserved

0x002B 0xA0 Reserved

0x002C 0x00 Reserved

0x0030 0x00 SCLK_CTRL

0x0031 0x00 AUDIO_CTS0

0x0032 0x00 AUDIO_CTS1

0x0033 0x00 AUDIO_CTS2

0x0034 0x00 AUDIO_N0

0x0035 0x00 AUDIO_N1

0x0036 0x00 AUDIO_N2_COEFF

0x0037 0x00 CLK_CLEAN_STS

0x0038 0x00 Reserved

0x0039 0x00 Reserved

0x003A 0x00 Reserved

0x003B 0x00 Reserved

0x003C 0x00 Reserved

0x003D 0x00 Reserved

0x003E 0x00 Reserved

0x003F 0x00 Reserved

0x0040 0x14 Reserved

0x0041 0x4B Reserved

0x0042 0x00 Reserved

0x0043 0x00 Reserved

0x0044 0x80 Reserved

0x0045 0x00 Reserved

0x0046 0x00 Reserved

0x0047 0x00 Reserved

0x0048 0x00 APB_CTL

0x0049 0x00 APB_ADR0

0x004A 0x00 APB_ADR1

0x004B 0x00 APB_DATA0

0x004C 0x00 APB_DATA1

0x004D 0x00 APB_DATA2

0x004E 0x00 APB_DATA3

0x004F 0x00 BRIDGE_CTL

0x0050 0x97 BRIDGE_STS

0x0051 0xA1 EDID_ID

0x0052 0x1E EDID_CFG0

0x0053 0x00 EDID_CFG1

0x0054 0x28 BRIDGE_CFG

0x0055 0x0C AUDIO_CFG

0x0056 0x00 Reserved

0x0057 0x00 Reserved

0x0058 0x00 Reserved

0x0059 0x00 Reserved

0x005A 0x82 DUAL_STS

0x005B 0x20 DUAL_CTL1

0x005C 0x42 DUAL_CTL2

0x005D 0x06 FREQ_LOW

0x005E 0x44 FREQ_HIGH

0x005F 0x00 HDMI_FREQ

0x0060 0x22 SPI_TIMING1

0x0061 0x02 SPI_TIMING2

0x0062 0x00 SPI_CONFIG

0x0064 0x10 PGCTL

0x0065 0x00 PGCFG

0x0066 0x00 PGIA

0x0067 0x00 PGID

0x0068 0x00 Reserved

0x0069 0x00 Reserved

0x006A 0x00 Reserved

0x006B 0x00 Reserved

0x006C 0x00 Reserved

0x0070 0x00 SlaveID[1]

0x0071 0x00 SlaveID[2]

0x0072 0x00 SlaveID[3]

0x0073 0x00 SlaveID[4]

0x0074 0x00 SlaveID[5]

0x0075 0x00 SlaveID[6]

0x0076 0x00 SlaveID[7]

0x0077 0x00 SlaveAlias[1]

0x0078 0x00 SlaveAlias[2]

0x0079 0x00 SlaveAlias[3]

0x007A 0x00 SlaveAlias[4]

0x007B 0x00 SlaveAlias[5]

0x007C 0x00 SlaveAlias[6]

0x007D 0x00 SlaveAlias[7]

0x0080 0x00 RX_BKSV0

0x0081 0x00 RX_BKSV1

0x0082 0x00 RX_BKSV2

0x0083 0x00 RX_BKSV3

0x0084 0x00 RX_BKSV4

0x0090 0x00 TX_KSV0

0x0091 0x00 TX_KSV1

0x0092 0x00 TX_KSV2

0x0093 0x00 TX_KSV3

0x0094 0x00 TX_KSV4

0x0098 0x00 Reserved

0x0099 0x00 Reserved

0x009A 0x00 Reserved

0x009B 0x00 Reserved

0x009C 0x00 Reserved

0x009D 0x00 Reserved

0x009E 0x00 Reserved

0x009F 0x00 Reserved

0x00A0 0x00 RX_BCAPS

0x00A1 0x00 RX_BSTATUS0

0x00A2 0x00 RX_BSTATUS1

0x00A3 0x00 KSV_FIFO

0x00C0 0x00 HDCP_DBG

0x00C1 0x00 Reserved

0x00C2 0xA8 HDCP_CFG

0x00C3 0x00 HDCP_CTL

0x00C4 0x40 HDCP_STS

0x00C5 0x38 Reserved

0x00C6 0x00 HDCP_ICR

0x00C7 0x00 HDCP_ISR

0x00C8 0xC0 NVM_CTL

0x00C9 0x00 Reserved

0x00CA 0x00 Reserved

0x00CB 0x00 Reserved

0x00CC 0x00 Reserved

0x00CE 0xFF BLUE_SCREEN

0x00D0 0x00 IND_STS

0x00D1 0x00 IND_SAR

0x00D2 0x00 IND_OAR

0x00D3 0x00 IND_DATA

0x00E0 0x00 HDCP_DBG_ALIAS

0x00E1 0x00 Reserved

0x00E2 0xA8 HDCP_CFG_ALIAS

0x00E3 0x00 HDCP_CTL_ALIAS

0x00E4 0x40 HDCP_STS_ALIAS

0x00E5 0x38 Reserved

0x00E6 0x00 HDCP_ICR_ALIAS

0x00E7 0x00 HDCP_ISR_ALIAS

0x00F0 0x5F HDCP_TX_ID0

0x00F1 0x55 HDCP_TX_ID1

0x00F2 0x42 HDCP_TX_ID2

0x00F3 0x39 HDCP_TX_ID3

0x00F4 0x34 HDCP_TX_ID4

0x00F5 0x39 HDCP_TX_ID5

0x00F6 0x00 Reserved

0x00F8 0x00 Reserved

0x00F9 0x00 Reserved

Please guide me on it.

Regards,

Madan

  • Hi Madan,

    I would like to confirm the configuration you are running. From the screenshot provided, it looks like the link is detecting a UH 926 deserializer, could you check and confirm the link that is established between the SER and the DES?

    Reading from these registers, "0x005F" returns "0x00", which indicates that the HDMI receiver is not detecting a valid signal where it should be returning the frequency. 

    Would you be able to confirm these two:

    1. The link established between the SER and DES shows no fluctuations or loss of lock, and that the received DES is confirmed to be 948 in ALP?

    2. Ensure that the following Power-Up sequence is followed from the datasheet recommendations: VDD18, then VTERM, then VDD11, activate PDB then apply HDMI input.

    Best,

    Miguel

  • Hi Miguel,

    confirming below:

    1. The link established between the SER and DES shows no fluctuations or loss of lock, and the received DES is confirmed to be 948 in ALP?

     - DES is 948 which is over the display, but ALP not detecting it.

    2. Ensure that the following Power-Up sequence is followed from the datasheet recommendations: VDD18, then VTERM, then VDD11, activate PDB then apply HDMI input.

    - Yes, we followed the recommended sequences, but still HDMI was not detected.

    Also, tried below:

    1. Force assert to HMDI 

    2. Cross-check the jumper and switches.

    3. ALP re-install, and cross-check whether the library present or not

    ALP is getting stuck many times, it is the latest software release downloaded from TI website.

    Let me know how we can proceed.

    Thanks,

    Madan

  • Hi Madan,

    Thank you for the updates.

    I would like to request additional information regarding the schematics and layout between the 949A and the 948 device, focusing on evaluating the link established between the Serializer and Deserializer. This may be a prerequisite for the HDMI to register on the 949A. Ultimately, we would like to have lock register between the devices.

    If you prefer to share the schematic privately, you can email me at m-bolante@ti.com or accept my friend request on E2E to send over a private message.

    Best,

    Miguel

  • Hi Miguel,

    Thank you for the reply.

    From the schematics side, we looking to get from the hardware team.

    There are a couple of observations we have:

    1. The ALP tools not detecting the 949 correctly, we have manually added 949 devices, still show incorrect device profile:

    2. It seems that ALP is a 32-bit tool, actually, we are using a 64-bit, Windows 10 system, does it work? if not, is there any alternative solution for it?

    We are using the ALP 1.57 version, please confirm if any different version needs to be used. Also, referring to the user guide "DS90Ux949EVM User's Guide", "Literature Number: SNLU169 December 2014".

    Let me know of any newer versions of documents and tools to be referred to.

    I would like to add a few of my colleagues at BCC.

    Thank You,

    Madan

  • Hi Madan,

    From the schematics side, we looking to get from the hardware team.

    Once you get these, feel free to send me a direct message if you do not wish to share the schematics on this public forum.

    The ALP tools not detecting the 949 correctly, we have manually added 949 devices, still show incorrect device profile:
    It seems that ALP is a 32-bit tool, actually, we are using a 64-bit, Windows 10 system, does it work? if not, is there any alternative solution for it?

    This version of ALP is sufficient for the x64 OS being used. Version 1.57 is also appropriate.

    It seems that the ALP screenshot you have is no longer showing the 949 in the info tab, whereas the first screenshot did include it. Has there been any changes in your setup between these two submissions?

    Aside from ALP 949 detection issues, I believe emphasis on getting lock established between the 949 and 948 would be a great start to prioritize. Please let me know if any other items or issues are preventing this link. 

    Best,

    Miguel

  • Hi Miguel,

    I'm debugging a bit more, Can help me with the power sequence:
     - VDD18, then VTERM, then VDD11, and wait for settle then activate PDB.

    Can you please point out me jumper number and the setting to be applied? and When?
    And also how can we know that power is settled and ready PDB and HMDI input?

     Thanks,
    Madan

  • Hi Madan,

    I'm debugging a bit more, Can help me with the power sequence:
     - VDD18, then VTERM, then VDD11, and wait for settle then activate PDB.

    These power-up requirements including the PDB pin are shown in the chip datasheet below:
    DS90UB949-Q1 1080p HDMI to FPD-Link III Bridge Serializer datasheet (Rev. B) (ti.com)

    This is section 9.1, power up requirements.

    With the sequence you mentioned, it may be better to flip your sequence of VTERM and VDD18.

    Can you please point out me jumper number and the setting to be applied?

    If you are using the EVM, there should be an external voltage supply of 12V as a barrel jack, which would take care of the timing.

    However, if you are powering the individual pins, the test point jumpers correspond to J35 for VDD11, J39 for VDD1V8, J42 for VDD33, and J40 for VTERM. This can all be found under the schematic shown in "A EVM PCB Schematics": DS90UH949-Q1EVM User's Guide (ti.com).

    "Power is settled" refers to the steady state reached for each voltage level.

    Best,

    Miguel

  • Hi Miguel,

    I have followed the mentioned power sequence, but neither EVM detects ALP tools nor any of the LEDs turn ON.

    May I know how long needs to wait to settle power?

    Regards,

    Madan

  • Hello, 

    Since today is a US public holiday, we will resume activity on this thread tomorrow. Thanks for your patience. 

    Regards, 

    Logan

  • Hi Madan,

    The EVM should turn on immediately upon powering on, what is the result of using a 12-V barrel jack? If the EVM does not turn on correctly, there may be an issue with how the 949 is operating on the DC Voltages. Have you taken DC measurements from the test points to confirm that the voltages are correct?

    Best,

    Miguel

  • Hi Miguel,

    We have a 12V DC barrel jack with a 1A current rating. 

    With the default setting of jumper and switches, EVM gets ON and detects in ALP.

    But with power sequences mentioned in the datasheet,  J35 for VDD11, J39 for VDD1V8, J42 for VDD33, and J40 for VTERM, EVM didn't detect in ALP, seems no power ON

  • Hi Madan,

    Yes, continue with the default setting and the 12V DC barrel jack, this will follow the power sequencing for you and is the best option for power stability.

    When the EVM detects in ALP, are you now seeing 949 EVM?

    Best,

    Miguel

  • Hi Miguel,

    We continue on 12V DC barrel jack power and default setting, and the device gets detected.
    Wondering the Revision shown is 9.

    As per the user guide, it should show Revision :1
    Is it correct? we using rev-B EVM.

  • Hi Madan,

    The revision of the board may differ from what's shown in the datasheet, but I confirmed that the revision for the 949 EVM in-house is also Rev 1 (Rev K).

    What you're seeing in the info tab may be confirmed with the following procedure:

    The command to run in the scripting window under the scripting tab is:
    "board.ReadI2C(0x18, 0x0D)", this should return 16 (0001 0000) if it is revision 1.

    Where 0x18 is the SER IDx address, 0x0D is the register holding revision info, and the first 4 bits in register 0x0D represent the board revision.

    Please let me know if ALP is able to detect link between SER and DES.

    Best,

    Miguel