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DP83867ERGZ-R-EVM: RX_DATA/RX_CTRL Signals

Part Number: DP83867ERGZ-R-EVM

Hi,

I have a quick question about the DP83867ERGZ-R-EVM board. Here is out test setup. The interface between the Soc Dev Board and DP83867ERGZ-R-EVM is RGMII.

      SoC Dev Board ---------- DP83867ERGZ-R-EVM ---------- Router ---------- Test PC

The PHY link is established at 1000Mbps/Full duplex successfully. Both LED_0 and LED_1 on the EVM board light up. When the Test PC sends pings to the board, the LED_2 keeps blinking, but the RX_DATA/RX_CTRL signals are NOT toggling.

My question is, if we disconnect the Soc Dev Board from the EVM board, and then keep sending pings from the Test PC to the DP83867ERGZ-R-EVM board, are we supposed to see the RX_DATA and RX_CTRL signals toggling? 

Thanks,

Amy

  • Hi Amy,

    RX_DATA and RX_CTRL are depend on MAC interface. When you said your PC is successfully pin, that means your MDI signal are functioning correctly. 

    It seems like the problem lies on RGMII communication. Could you check if you are seeing any TX_DATA?

    Could you also read register 0x006E to make sure PHY is strap properly to RGMII mode?

    --

    Regards,

    Hillman Lin

  • Hi Hillman,

    Thanks so much for helping me! Yes, we are able to read/write PHY chip registers with no problems. The MDI communication is good. Register 0x006E reads out 0x8000. When the board powers up, it can establish 1000Mbsp/Full duplex successfully.

    We didn't really configure any registers except for clearing bit INT_TST_MODE_1 (CFG4). The board is DP83867ERGZ-R-EVM. I think the default strap settings put it in RGMII mode already. 

    Here are the values of some register when the board powers up.

    BMCR: 0x1140

    PHYCR: 0x5048

    BMSR: 0x7969

    STRAP_STS1: 0x8000

    STRAP_STS2: 0x0050

    RGMIICTL: 0x00D3

    RGMIICTL2: 0x0000

    CFG4: 0x1031

    We didn't try to ping or send any data from the board yet. We can try that.

    We are trying to isolate the problem, so we are thinking to disconnect the RGMII interface from our SoC dev board. The test setup will look like this

     DP83867ERGZ-R-EVM ---------- Router ---------- Test PC

    So, in this case, if we ping from the Test PC, do we expect to see the RX_CTRL/RX_DATA toggling?

    Thanks so much,

    Amy

  • Hi Amy,

    There is one thing that we could isolate the issue on RMGII or MDI side.

    • Enable MII loopback through register 0x0000 bit[14] and see if you are able to receive the signal that is send from SoC.

    Could you also read register 0x0032 and write register 0x0032 bit[0] to 1 and see if that help the issue?

    We would like to point out in this EVM. This EVM is not perfect for RGMII communication because we uses external wires. Please do make sure each wires are shorts with same lengths when you are connecting RGMII communication.

    --

    Regards,

    Hillman Lin

  • Hi Hillman,

    We enabled MII loopback, but the EMAC driver didn't receive anything. We didn't see RGMII Tx toggle either. Register 0x0032 is 0x00D3.

    How short you would recommend the wires to be?

    Thanks,

    Amy

  • Hi Hillman,

    Could you please confirm if we disconnect all RGMII wires from the DP83867ERGZ-R-EVM board, and ping from the Test PC, we are NOT supposed to see RX_DATA/RX_CTRL toggle at all? 

    DP83867ERGZ-R-EVM ---------- Router ---------- Test PC

    Thanks,

    Amy

  • Hi Amy,

    We will review it internally and provide you an response later this week.

    --
    Regards,

    Hillman Lin

  • Hi Amy, 

    TX_Data are the input of the PHY. It seems like the MAC or SoC Dev board is not generating any signal to the DP83867EVM. Could you double check on the SoC Dev board?

    Regarding to your second questions, RX_DATA and RX_CTRL could trigger if your PHY is not in MAC isolate mode.

    --

    Regards,

    Hillman Lin

  • Hi Hillman,

    We dropped the link speed to 10/100Mbps, everything is working with the test board now. Thanks so much for your help!

    Best,

    Amy