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DS90UB936-Q1: AEQ and BIST question

Roy Chou1
Genius 14635 points
Part Number: DS90UB936-Q1

Hi Team,

I have few questions would like to check with you.

1. According to the content, "Each RX port signal path continuously monitors cable characteristics for long-term cable aging and temperature changes."  Does it mean that our AEQ change the setting in real time?

2. For the BIST, if our PASS is 'hi' when run BIST. Does it mean that the SerDes link is ok, but we can't guarantee the FPD-Link when transmit the video timing, is it correct? I asked because we have one case that PASS is high when ran BIST, but when we do real data transmission, the lock was unstable and cause the image output flicker.

3. When I set the BC_FREQ_SELECT from b101 to b110, the CLK_OUT becomes to 48MHz from 24MHz. Also, the eye width I measured on the Deserializer becomes to 0.25ns from 0.5ns. I'm not sure how to explain the behavior, may you help explain for me?

Regards,

Roy

  • 0
    TI__Guru* 97360 points

    Hello Roy,

    Roy Chou1 said:
    1. According to the content, "Each RX port signal path continuously monitors cable characteristics for long-term cable aging and temperature changes."  Does it mean that our AEQ change the setting in real time?

    Yes, AEQ is always monitoring the signal/Link quality. If there is weakness and errors start to accumulate, then AEQ will adapt in real time.

    Roy Chou1 said:
    2. For the BIST, if our PASS is 'hi' when run BIST. Does it mean that the SerDes link is ok, but we can't guarantee the FPD-Link when transmit the video timing, is it correct? I asked because we have one case that PASS is high when ran BIST, but when we do real data transmission, the lock was unstable and cause the image output flicker

    When running BIST you should not monitor PASS. You should monitor BIST error counters for FC in the DES and for BC in the SER.

    Please refer to this Appnote section 3.2

    Roy Chou1 said:
    3. When I set the BC_FREQ_SELECT from b101 to b110, the CLK_OUT becomes to 48MHz from 24MHz. Also, the eye width I measured on the Deserializer becomes to 0.25ns from 0.5ns. I'm not sure how to explain the behavior, may you help explain for me?

    by changing those bits you are changing the Speed of the back channel which changes the speed of the FC (FC speed = BC speed x 80). For the higher speed FC you will have double frequency (from 1GHz to 2GHz) which means half the eye-width.

  • 0 in reply to Hamzeh Jaradat
    TI__Genius 14635 points

    Hi Hamzeh,

    I remember that our final EQ level can't determine the link quality, but not sure the reason.

    Could you explain more about why can’t use EQ level to determine the link quality?

     

    If we have two units.

    - A unit (normal case)

    The EQ_Level is 4 after AEQ adaption.

     

    - B unit (special case)

    The EQ_Level is 12 after AEQ adaption.

     

    Could I say that this B unit has a worse link quality under EQ_Level=4 condition than A unit under EQ_Level=4 condition? If the answer is not, why B unit not use EQ_Level=4 when runnig AEQ operation?


    Regards,

    Roy

  • 0 in reply to Roy Chou1
    TI__Guru* 97360 points

    Hello Roy,

    You are right. A higher AEQ level means more losses on the link (may be bad cable, bad connector, bad layout or bad AC coupling cap) or worst signal quality.