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SN65LVELT23: Can LVDS(1.8V) signal input to this chip fully functional?

Joon Kim
Prodigy 20 points
Part Number: SN65LVELT23
Other Parts Discussed in Thread: DSLVDS1048

In the spec, Vidiff is not specified for LVDS interface.  What is the value?

If this device is driven by LVDS driver biased with 1.8V, would this device work?   SN65LVELT23 is biased with 3.3V.

  • 0
    TI__Genius 15321 points

    Hi Joon,

    Yes this device accepts LVDS signals - the input high-voltage common-mode range has a minimum value of 1.2V.

    Regards,

    Amy

  • 0 in reply to Amy
    Prodigy 20 points

    Thank you for your answer. 

    However, I still did not get the minimum input differential voltage specification, yet.  [Sorry, "Yes this device accepts LVDS signals" is very subjective answer.  I need a solid specification number.]  My understanding of LVDS minimum differential input voltage is specified as 200 mV (|Vin+ - Vin-| = 200 mV).  So, this device meets this spec?

  • +1 in reply to Joon Kim
    TI__Genius 15321 points

    Hi Joon,

    The datasheet mentions a minimum input common mode voltage range of 1.2V and a minimum Vpp of 200mV. The datasheet states that the input must swing to 200mV to have the full logic swing at the output (footnote 6 in 'AC Characteristics'). This meets the standards of LVDS.

    Get Connected: Interfacing between LVPECL, VML, CML, LVDS, and sub-LVDS levels - Analog - Technical articles - TI E2E support forums

    Additionally, this application note describes how to properly terminate the input signal to the SN65LVELT23.

    Regards, Amy

  • 0 in reply to Amy
    Prodigy 20 points

    Hi Amy,

    I'm wondering if the common mode voltage has any sort of tolerancing or if 1.2V is the absolute minimum? The same applies to Vpp. While the nominal operation falls within this range, we have to design per the full potential range. Im curious if this part will work down to a common mode of 1.0V and a Vpp of 100mV. Unfortunately the datasheet is lacking quite a bit of information.

  • 0 in reply to Jeffrey Fisher
    TI__Genius 15321 points

    Hi Jeffrey,

    Based on the datasheet specifications, this device appears to have a greater tolerance range for LVPECL signals while meeting the LVDS standard. The VIH and VIL levels that are listed in the datasheet only apply to LVPECL, and not LVDS.

    In summary, this device is compatible with the LVDS signaling standard. However, the datasheet does not indicate that is room for tolerance beyond the minimum input common mode voltage range of 1.2V and a minimum Vpp of 200mV.

    Regards, Amy

  • 0 in reply to Amy
    Prodigy 20 points

    Amy,

    It seems as though something like the DSLVDS1048 would be better suited then. However, the datasheet doesn't mention much about what happens below 200mVpp other than an affect to skew. Please confirm this chip would be better suited or if you have another in mind.

  • 0 in reply to Jeffrey Fisher
    TI__Genius 15321 points

    Hi Jeffrey,

    Try filtering using our search tool to fit your system requirements. To compare devices, select the devices of interest with the checkbox and use the 'compare' feature. I did this for you here comparing the DSLVDS1048 and the SN65LVELT23: Compare products (ti.com)

    I also have filtered through our product page using the # of receivers as 2 or 4 and an input LVDS signal: LVDS, M-LVDS & PECL ICs product selection | TI.com

    Feel free to use this tool to find the best fit for your application. Let me know if you have any other questions.

    Regards, Amy