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Hi TI experts,
We want to use SN65DSI83 between CPU and LCD display as below:
Now we configured according to the steps in the data sheet, but in the second step, the DSI data must be driven to LP11 state (that is, setting the data to high level) was limited by the underlying driver of the CPU. We could only let The data is kept output, and then the following series of resets, register configuration, PLL enable and other operations are performed. But in the end, the internal PLL of SN65DSI83 could not be locked.
if there is a way to solve this situation.
Hey Gary,
Unfortunately you will need to find a way to fix the drivers of the CPU, as the LP11 state upon startup is a requirement per the MIPI spec:
You can additionally test the functionality of your system on the TX side of the DSI83 by enabling the color bar (table 7-8 in datasheet)
Hi VP,
Now SN65DSI83 can work well and can normally output signals.
Another question is that all the NC pins from SN65DSI83 can be uesed for pin out and they don't connect anything eles inside the SN65DSI83.
