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TCA9517-Q1Hi,
In my application, I have a battery charger chip (BQ24780S) and a battery BMS (some BQ chip I don't know precisely) talking together on a shared SMBus, and a FPGA sending some requests from time to time. There is a condition where the FPGA is powered OFF while the battery and its charger are still communicating. I would like to use the TCA9517-Q1 to "isolate" the FPGA from the rest of the bus when powered OFF.
As I don't want the TCA9517-Q1 to sink current on the battery, I plan to power both A and B sides with the FPGA 3V3 network (i.e. both sides can be powered OFF at the same time). The A side would be connected to the charger/battery network while the B side would be connected to the FPGA. The pull-up resistors on the charger side would not be polarized by the A side power, but to a "permanent" 3V3 issued from the battery, because I need the charger to keep on working with its battery even when the FPGA 3V3 is down.
Can I do that ?
In such condition, if reliable, what leakage current would sink the SDAA and SCLA pins ?
Is there a better way to "unplug" my FPGA from the SMBus without consuming energy from the battery ?
Thank you by advance !
Cyril
Hi Cyril,
Are you asking about leakage cases when VCCA = VCCB = 0V, and when VCCA is powered ON but VCCB is powered OFF. Looking for clarification.
Regards,
Tyler
Hi Tyler,
Yes, I would like to know the value of the leakage current in the A side bits when the TCA9517-Q1 is completely unpowered (VCC_A and VCC_B = 0 V) AND with a third power source of 3.3V used to pull-up the bits with 10K resistors. That is my point.
Thx !
Cyril
Cyril,
The TCA9517-Q1 exhibits high-impedance I2C pins when device is powered-off... VCCA = VCCB = 0V.
Leakage would be small. I suspect from A-side to B-side, it would be uA or less, more likely in the nA range. We don't specify the exact leakage amount in the datasheet. We only have the following note in the features sections "high impedance i2c pins when device is powered-off."
Regards,
Tyler