DP83822H: MII line ISOLATE settings when using WoL

Hi Conor,

For DP83822PHY, the WoL will automatically enable the MII isolation to reduce the power consumption on DP83822PHY and system. Therefore, DP83822PHY need to make sure the MII isolation is disable in order to trigger the WoL. This will trigger MII isolation enable when the PHY receive WoL information.

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Regards, 

Hillman Lin

Thank you for your reply.

What I want to know is not about the DP83822H, but about the DP83867CR.

You answered something like the following:
■ It is not required to disconnect MII/GMII/RGMII lines for WoL application.

The datasheet states that when using WoL, it is necessary to set BMCR bit[10] Disable = MII Isolate disable. From your answer, I understand that when using WoL, communication will not occur on the MII line even if you do not set isolation. Is my understanding correct?

Also, the ports that are isolated with BMCR bit[10] are listed below.
■Isolates the Port from the MII with the exception of the serial management.

Could you tell me specifically which ports are isolated?

Thanks,

Conor

Hi Hillman,

Question 1

Hillman Lin said:

Yes, it is not required to disconnect MII/GMII/RGMII lines for WoL application. After WoL trigger, the MAC isolation will enable and silence the communication on the MAC lines.

I would like to confirm just in case. I made the following interpretation from your answer. Are these interpretations correct? During WoL settings, the ports below output low and do not communicate with the MAC side.

・RX_CLK
・RX_D[3:0]
・RX_DV

Question 2
Is the above port setting automatically set when WOL_INT_EN=1? Or do I need to configure individual ports?

Thanks,

Conor

Hi Hillman, 

Hillman Lin said:

Yes, your understanding is correct. When WoL is enable, the RX_CLK, RX_[3:0], and RX_DV will go silence.

All the ports above will automatically set when WoL is enable.

Is there a document that clearly states the answers you provided?

I would like to ask you something additional. When powering off the MAC side using WoL, MDIO must be disconnected using logic etc. Is this my understanding correct?

Thanks,

Conor

Hi Hillman,

Hillman Lin said:

When WoL enable, only the MAC side will be isolated. If SoC in your system is not power off, you can still access the MDIO communication.

When using WOL, the CPU on the MAC side is not in sleep mode, but in a configuration where the power is turned off (power is not supplied to the CPU). Details are provided in "Related Questions".

When the power is turned off on the connected MAC side during WoL settings, do I need to disconnect MDIO using logic?

Thanks,

Conor

Hi Conor,

I am not sure if I understand your questions correctly.

• May I ask what did you mean by "configuration where the power is turned off? 
• Is feature for DP83822 where WoL is enable the MAC isolation is automatically isolate not feasible for customer?

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Regards,

Hillman Lin

Hi Hillman,

Hillman Lin said:

May I ask what did you mean by "configuration where the power is turned off? 

I mentioned it in a related question, but I'll post it again. "configuration where the power is turned off" meant:

・The power of the CPU with a built-in MAC connected to the PHY is turned off (the PHY itself is always operated with a separate power supply)
・The GPIO signal of the PHY activated by the magic packet is connected to the Enable terminal of the power supply.
・Turn on the power from PHY and start the device

Hillman Lin said:

Is feature for DP83822 where WoL is enable the MAC isolation is automatically isolate not feasible for customer?

The IC currently being evaluated is DP83867CR, not DP83822. Additionally, when implementing WoL, it is not possible to power on the CPU due to system constraints. Returning to the original question, should the logic disconnect the MDIO if the connected MAC side is powered off during WoL configuration?
I understand from your answer that there is no need to disconnect the MII/GMII/RGMII line.

Thanks,

Conor

Hi Conor,

Thank you for the clarification.

Again, sorry for the confusion again. DP83867 also have the similar feature on WoL.

I don't think it is necessary to disconnect the MDIO lines as long as MDIO pull up is connected to the MAC side power supply.

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Regards,

Hillman Lin

Hi Hillman,

Do you have any update?

Thanks,

Conor

Hi Hillman,

Conor said:

 - The GPIO port that outputs interrupts from PHY can output pulses. Also, GPIO interrupt output is Default: Active High.
 - If the device is held in the reset state when the power is initially turned on, the problem will not occur.

I have confirmed the following two points from the data sheet, so please answer the other questions.

Thanks,

Conor

Hi Conor,

Q1: Yes, you are correct. If customer is looking for Broadcast WoL please consider DP83869 instead of DP83867.

Q2: Yes, your understanding is correct on most of the statement.

• Just want to confirm on "held in reset state" comment. May I ask which device are you referring to? PHY won't turn off during WoL stage.

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Regards,

Hillman Lin

Hi Hillman,

Hillman Lin said:

Q1: Yes, you are correct. If customer is looking for Broadcast WoL please consider DP83869 instead of DP83867.

Application Note "DP838xx Wake-on-LAN" states that DP83687 is Unicast Only. However, when I looked at the data sheet, I couldn't read the above information. Is it mentioned somewhere in the datasheet?

Hillman Lin said:

Q2: Yes, your understanding is correct on most of the statement.

We apologize for the confusion. This is the same question as the last post in the thread below.
Just to be sure, there is no problem with DP83869HM, right?
https://e2e.ti.com/support/interface-group/interface/f/interface-forum/1328969/dp83822h-how-to-wake-up-the-cpu-through-wol/5065094#5065094

Thanks,

Conor

Hi Hillman,

We are moving towards adopting the DP83869HM, but just to be sure, I would like to know in detail why the DP83867 only supports Unicast.

It seems that E2E below is related, but please tell me in detail why only Unicast is supported and what restrictions there are.

DP83867CR: Not Detecting Magic Packet - Interface forum - Interface - TI E2E support forums
https://e2e.ti.com/support/interface-group/interface/f/interface-forum/1176498/dp83867cr-not-detecting-magic-packet/

Thanks,

Conor

Hi Conor,

I discuss with the team. Unfortunately, the information provided in the E2E are all the detail we could share.

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Sincerely,

Hillman Lin

Hi Hillman,

Hillman Lin said:

I discuss with the team.

OK, I look forward to any updates from you.

I have one additional question in addition to the above.

Even if you have configured WoL on the DP83867CR, we believe that if a reset occurs, you will need to reconfigure it from the MAC side. Has TI released an Ethernet IC that allows initial settings to be made from the built-in ROM (or external memory) without having to configure settings from the MAC side? As far as I know, there is no such lineup, but I would like to confirm just to be sure.

Thanks,

Conor

Hi Conor,

Not sure if this is your question. As long as the PHY is not being reset. All the register memory won't change.

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Regards,

Hillman Lin

Hi Hillman,

Hillman Lin said:

I discuss with the team. Unfortunately, the information provided in the E2E are all the detail we could share.

We look forward to your updates regarding this.

Hillman Lin said:

Not sure if this is your question. As long as the PHY is not being reset. All the register memory won't change.

We apologize for the misleading information. As far as I know, TI's PHYs are configured using registers (RAM), but are there any PHYs that have EEPROM etc. that do not require reconfiguration even when the power is turned off? In other words, I am looking for a way to write design data once and retain it even if the power goes out.

I also have an additional question.　If you have data on the current consumption when excute WoL for DP83867CR, would it be possible for you to provide the information? There was data on current consumption below, but there was no description of data when excute WoL.
https://www.ti.com/lit/an/snla241/snla241.pdf

Thanks,

Conor

Hi Conor,

1. Like I said earlier, I discuss with the team but we are not able to provided this information externally.
2. The register memory will store in the PHY even when the SoC is being reset. However, the register memory will go away if the PHY is being reset. Again, I believe in Wake-on-Lan feature the PHY is always turn on therefore this should not be a concern.
3. I double check with the team. It seems like WoL have the similar power consumption than normal operation since the PHY is not complete turn off.

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Regards,

Hillman Lin

Hi Hillman,

Hillman Lin said:

I double check with the team. It seems like WoL have the similar power consumption than normal operation since the PHY is not complete turn off.

Thank you for confirmation. We look forward to your updates.

Thanks,

Conor

Hi Conor,

The power consumption should follow the normal operation in WoL application.

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Regards,

Hillman Lin

Hi Hillman,

Hillman Lin said:

The power consumption should follow the normal operation in WoL application.

When you say "normal operation", are you referring to the Normal Mode in Figure 1 of the document below?

https://www.ti.com/lit/an/snla241/snla241.pdf

Is Normal Mode also used as a reference when waiting, not when running WoL?

Thanks,

Conor