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DP83869HM: Regarding IEEE1588 Setup

Keito Katafuchi
Prodigy 225 points
Part Number: DP83869HM
Other Parts Discussed in Thread: DP83869

I am trying to get the DP83869HM to output a pulse to the MAC during both Tx/Rx for SFD.

Do I just have to set the following to get it to work?

Register: GPIO_MUX_CTRL
Offset: 1E0h
Field: LED_2_GPIO_0_CTRL
Setting: 5h = Transmit SFD

Register: RXF_CFG
Offset: 134h
Field: ENHANCED_MAC_SUPP ORT
Setting: 1h

If the above settings are done, the DP83869 will:

On Tx SFD: Output a pulse to pin#22
On Rx SFD: Output a pulse to pin#45

Is my understanding correct?

  • +1
    TI__Mastermind 20442 points

    Hi Keito,

    You are correct, however my understanding is the register writes to 0x1E0 are unnecessary for GPIO_1 and GPIO_0 to function as TX_SFD and RX_SFD by default once SFD is enabled in 0x134.

    In the case that these pins do not function as expected by default after writing 0x134[7] = 1h, these writes can be performed:

    0x1E0h[3:0] = 6h for GPIO_0 = RX_SFD

    0x1E0h[7:4] = 5h for GPIO_1 = TX_SFD 

    Thank you,

    Evan

  • 0 in reply to Evan Mayhew
    Prodigy 225 points

    Hi Evan,

    Thanks. Just for clarification...

    Looking at Table 9-84. GPIO_MUX_CTRL Register Field Descriptions from the datasheet, I understand how writing 1E0[3:0] = 6h would enable the RX_SFD. From the Description, I understand doing so will configure pin#45 for a pulse on RX_SFD.

    However, I don't see any indication writing 0x1E0h[7:4] = 5h would enable the TX_SFD.
    From the Description for that field, it states that if either TX_SFD or RX_SFD is set in 0x1E0h[3:0], then this pin (pin#22) would automatically be configured for TX_SFD pulse, without having to actually write anything to this field.

    Is that correct?

  • +1 in reply to Keito Katafuchi
    TI__Mastermind 20442 points

    Hi Keito,

    I understand the confusion here; please treat the register descriptions for 0x1E0[3:0] and 0x1E0[7:4] as identical, the only difference being automatic config in RX_SFD / TX_SFD for GPIO 0 vs. GPIO 1.

    The automatic configuration is applied when enabling either type of SFD, however this configuration can be overridden by additional writes to the register following the description in [3:0].

    For example, GPIO_0 can be set manually as TX_SFD with [3:0] = 5h, and GPIO_1 as RX_SFD with [7:4] = 6h.

    Thank you,

    Evan

  • 0 in reply to Evan Mayhew
    Prodigy 225 points

    Hi Even, quick follow-up.

    Does the IEEE1588 timestamp pulse trigger on any packet type SFD? Or does the packet need to be a PTP/1588 TimeSync packet?

  • +1 in reply to Keito Katafuchi
    TI__Mastermind 20442 points

    Hi Keito,

    Pulse trigger will occur on any packet type.

    Thank you,

    Evan