DP83867E: SGMII link establishment failed, and there is no SGMII signal.

Hello,

Can you please check Reg 0x37 and 0x6E? Please note this is an extended register and thus needs specific extended register access per datasheet.

Can you also please share your schematic with connection of SGMII to MAC?

Sincerely,

Gerome

Hello Gerome,

1. Reg 0x37: 0000 and 0x6E: 8820. 

2. Schematic with connection of SGMII to MAC:

I used ethtool to confirm, and it shows "Link detected: yes".

However, ping fails regardless of whether I use 1Gbps or 100Mbps."

Hello Gerome,

I referred to the following web page to create the schematic, and I only use eth0.

https://docs.ethernet96.com/en/latest/

I hope it will help you.

Thanks.

Tim

Hi Tim,

It appears the SGMII connection is not established via Reg 0x37 indication. While MDI link is established, this is why you are not pinging. 

Can you please share where exactly are you probing for SOP/SON? As these are outputs of the PHY, this is what it can control. SIN/SIP will be a MAC issue, and thus you will need to bring it up with those respective experts. I would imagine the AC coupling cap would take care of any contention on the SGMII lines, so it is weird that you are seeing a dead line.

On the E EVM, are you connecting with SMA's?

Sincerely,

Gerome

Hello Gerome,

1. I'm using a probe to measure here, and the oscilloscope can measure up to 20GHz.

2. I use SMA connectors to connect the FPGA and DP83867E EVM. However, whether or not I connect the FPGA, the voltage of SOP/SIN remains unchanged, and there is no signal.

Q: How can I unilaterally transmit SGMII signals using the DP83867E?  Or how should I check if the functionality of the DP83867E is normal?

I've read the DP83867E User's Guide, Troubleshooting Guide, and DP83867E/IS/CS Robust, High Immunity...But I can't accurately execute the steps outlined in the Guide.

Can you provide me with a simple example or an accurate operational procedure?

Thanks.

Tim

Hi Tim,

I can reproduce in lab, but I recall that SGMII signals could be seen on scope when connecting the SOP/N SMAs directly to the channel with 50 Ohms termination to GND regardless of link. Could you please try and scope out without connecting to MAC in the interim to see if I need to reproduce during my day tomorrow?

Sincerely,

Gerome

Hello Gerome,

1. I found that the FPGA's MDIO/MDC is 1.8V, which is different from the DP83867E's MDIO: 2.5V. MDC/MDIO can transmit normally. Would this be a problem? Do I need to change the VDDIO of the DP83867E to 1.8V?

2. Is this the situation when not connected to the MAC?

I haven't sent any packets. I attempted to measure SON/SOP in this situation and found that there is a small signal on SON/SOP.

Is this a signal or noise?

Thanks.

Tim

Hi Tim,

Usually this is a problem, but somehow you were able to get initial register reads. However, I would be interested to see if you get the same data if you correct the FPGA to 2.5V VDDIO; or toss the DP83867E-SGMII-EVM to 1.8V VDDIO.

I will conduct quick test today in lab and provide results by end of week.

Sincerely,

Gerome

Hello Gerome,

Thank you for your help. I have set the DP83867E-SGMII-EVM to 1.8V VDDIO, but the test results remain unchanged.

If you think some other measurements may help to investigate more, please let us know.

Tim

Hello Gerome,

I confirmed that there is no issue with the DP83867E; the problem lies with the FPGA Linux settings.

I will recheck the FPGA settings. Thank you for your help. 

Tim