TUSB9261: Relationship between PCN# 20160317001 and EMC noise

Hi Nishie,

The TUSB9261 datasheet doesn't seem to list an EMC standard that it conforms to.  This may be something that wasn't measured and are unable to determine if the PCN #20160317001 is related.  

I will ask internally to see if there is any information we can gather.  Can you tell me how many TUSB9261 units tested?   Was the testing done all on the same system?

Thanks,

Nicholaus

Hi Nicholaus-san,

I appreciate your cooperation in collecting information within your company.

Nicholaus_Malone said:

Can you tell me how many TUSB9261 units tested?

->Customer checked the waveform with one each IC. Customer checked two ICs that showed the same phenomenon.

Nicholaus_Malone said:

Was the testing done all on the same system?

->There are same system.

Best Regards,

Nishie

Hi Nishie,

Alright, thanks for the information.  I'm still awaiting a response and will get back to you ASAP.

Regards,

Nicholaus

Hi Nishie,

It looks like there was a design change to the TUSB9261 die for the PCN you mentioned.  Without doing a design review, it would be difficult to say for sure if the PCN is what is creating the EMC difference.  It seems possible.  I have also confirmed that we do not claim EMC performance in the datasheet, and so it was not measured before and after the change.

Regards,

Nicholaus

Hi Nicholaus-san,

Thank you for your research.

Is the "Reason for Change: Improved product performance" mentioned in the PCN a performance improvement for EMC? Could you share the details of the improved performance? If it is difficult to list here, please let us know in private chat.

Best Regards,

Nishie

Hi Nishie,

It was not related to EMC.  EMC is not measured, and so it is not considered in performance. 

I'm unable to say the changes to the design as they are marked with NDA restrictions.  I would need to see an NDA with TI that allows me to discuss these things.  I would reach out to contact from TI that is listed on your NDA for more information.

Regards,

Nicholaus

Hi Nicholaus-san,

Thank you for your comment. I understand about NDA and performance.

Let me change the content of my question.

・In the waveform I sent you the other day, there is a difference in the operation when the IC starts. Do you know the cause of this? It is only the waveform of the EMC noise transition, but I would appreciate it if you could check it.

Also, is the following thread related to this matter? My customer uses 25 MHz crystal.

https://e2e.ti.com/support/interface-group/interface/f/interface-forum/632960/tusb9261-difference-between-rev-b-and-rev-c

Best Regards,

Nishie

Hi Nishie,

That is correct, Brian Quach's response is related to the change.

"In the newer revision, we fixed an intermittent issue with PLL not locking on power-up under certain supply ramping and reset conditions and crystal frequencies."

Your data shows an EMC difference between the two revisions during startup.  The changes are related to PLL during startup.  So, it seems that the die change could be the root cause. What issue is this causing for you and your customer?

Regards,

Nicholaus

Hi Nicholaus-san,

Sorry for the late reply.

The issues are as follows.

・Due to the die change, the customer's product has exceeded "VCCI class B," which is the EMC voluntary standard in Japan.

Before the die change, the EMC level in the 3GHz band dropped after a certain time from power on, as shown in the EMC waveform I sent you before. However, after the die change, the EMC level does not decrease. I think this may be the reason for exceeding the EMC standard. Could you tell me how to deal with this?

Best Regards,

Nishie

Hi Nishie,

Can you tell me more information about the customer, project, and volume?  If the EMC issue was caused by the die change, then I don't believe I can resolve this issue without getting other parties involved.  I can communicate this to the HSSC team internally and decide what to do. 

You can send me a direct message if there is confidential information.

Regards,

Nicholaus

Hi Nicholaus-san,

Thank you for your support.

I shared the information with you via private message. I would appreciate it if you could expand it to your company and support it.

Best Regards,

Nishie

Hi Nishie,

Alright, we can continue that discussion offline. 

I wanted to confirm that you have performed an A-B-A swap for this issue.

A-B-A Swap
1. Remove TUSB9261 Rev. B and TUSB9261 Rev. C from their respective PCB boards. 
2. Populate the board that previous had Rev. B silicon with Rev. C silicon
3. Populate the board that previously had Rev. C silicon with Rev. B silicon
4. Perform EMC testing on both boards and confirm the EMC issue follows the TUSB9261 Rev. C, and the EMC issue is resolved by Rev. B.

I ask because after reviewing this issue with the design team, there doesn't seem to be a change that would cause this change in EMC response.  The PLL behavior should be the same between both die after GRST# assertion.

Also, is the customer open to updating their board with a 40MHz crystal to see if this improved the EMC response?

Thanks,

Nicholaus