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Tool/software:
We believe that if an "active-low reset" is input from the /RESET pin when the power is turned on,
the reset state will be maintained and the POR will not be activated.
Is this idea correct?
See below.
POR and /RESET have the same effect. The device goes out of the reset state only when both VCC and /RESET are high.
Hi User6448843,
Please let me know if Clemens response answered your question.
Regards,
Tyler
I have an additional question about the power supply for the TCA6424A.
From the datasheet, does 9.2 apply to both VCCI and VCCP?
Hi User6448843,
The power on reset circuitry is tied to the VCCP level. Both VCCI and VCCP supplies need to be up for the device to function correctly, but power on reset is tied to VCCP. See section 8.5.1 Power-on Reset in the datasheet.
Regards,
Tyler
Thank you for your answer.
Judging from your answer, do Figure 9-4 and Figure 9-5 explain VCC (= VCCP)?
Thank you for your answer. (I have one more question.)
9.2 The Power Supply Recommendation suggest powering VCCP before VCCI, but are there any other startup and shutdown timing restrictions for VCCI?
※ VCCI power supply recommendations do not appear to be listed in the datasheet.
Hi User6448843,
I think my initial answer VCC = VCCP is slightly inaccurate.
VCC = VCCI and VCCP.
However, any power on reset voltage or timing specifications apply to the VCCP pin.
Regards,
Tyler