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DS100MB203 - Input and Output selection (SEL1, SEL0)

Kawai
Guru 19775 points
Other Parts Discussed in Thread: DS100MB203

Hi,

Please tell us about DS100MB203, how to select input/output in SMBus mode.
I am thinking the following register setting will enable SEL0/SEL1 control through SMBus.

1. ENSMB pin : 1k Ohm pull up to 2.5V (SMBus Mode)
2. Register 0x5E bit[2:1] : Override SEL1, SEL0 (Block pin control, 2'b11)
3. Register 0x5F bit[7:4] : SEL1, SEL0 Control(Select input and output)

Our customer is evaluating their board but they cannot select input and output through SMBus.
What do you think is the problem ?

Please give us your help.

Best Regards,
Kawai

  • 0
    TI__Expert 4400 points

    Your procedure for controlling SEL0 and SEL1 via the SMBus looks correct.

    Do you know if the customer is able to read/write to other SMBus registers and achieve the expected results?  For example, can they power down channels by writing to register 0x01, or read the device ID via register 0x51?  Please confirm if their SMBus implementation is working, and if this is just an issue with the SEL0 and SEL1 control.

    Gary Melchior

  • 0 in reply to Gary Melchior
    Guru 19775 points

    Gary-san,

    Thank you for your comment.

    SMBus access seems to be working correctly.

      - For SMBus read access, they can read correct device ID in Register 0x51.
      - For SMBus write access, they have checked the register after writing data if it is programmed correctly.

    In PIN mode (ENSMB=L), they can see the correct operation.

    But in SMBus slave mode(ENSMB=H), they cannot see any output from the device.
    Our customer connected the valid signal to both S_INA0 and S_INB0, though the device did not output either of the input signal (MUTE).

    There seems to have some more register setting needed to have an output .

    As we do not have an EVM, is it possible to test the operation with your EVM ?

    Below are their register setting.

      ADDR 0x06 = 0x18 (Disable CRC Mode)
      ADDR 0x08 = 0x08 (Block RXDET pin control, Allow MODE pin control)
      ADDR 0x0E = 0x0C (RXDET : Input is 50 Ohm)
      ADDR 0x5E = 0x07 (Block pin control for SEL1, SEL2, INPUT_EN)
      ADDR 0x5F = 0xF0 (Fanout disable)

      Other than the above setting, they have setting for EQ / DEM / VOD / RXDET for all channels.

    We are grateful for your help.

    Best Regards,
    Kawai

  • 0
    TI__Mastermind 43795 points

    Kawai-san,

    I setup the DS100MB203 in the lab and verified the SMBus setup.

    1. Ensure the ENSMB pull-up is 3.3V if using 3.3V mode (VIN  = 3.3V).  Control inputs are referenced to 3.3V in 3.3V mode and 2.5V in 2.5V mode.

    My register settings for setup of SINA0 --> DOUT0 path

    ADDR 0x06 --> Write 0x18

    ADDR 0x08 --> Write 0x08 //* Block RXDET pin control

    ADDR 0x0E --> Write 0x0C //* RXDET Input  = 50 Ohms

    ADDR 0x5E --> Write 0x07 //* Block SEL1/2, INPUT_EN

    ADDR 0x5F --> Write 0x30 // Select SINA0 -- DOUT0 path

    The EVM I used had the following switch settings.

    SW2 1=on, 2=off, 3=off

    SW1 and SW5 1=off, 2=off, 3=on, 4=off, 5=off, 6=on

    SW7 1=on, 2=off

    Regards,

    Lee 

  • 0 in reply to Lee Sledjeski
    Guru 19775 points

    Lee-san,

    Thank you for confirming the operation with the EVM.

    We are asking customer to change pull up voltage to 3.3V.

    Currently, they uses DS100MB203 in 3.3V mode, but ENSMB pin is pulled up to 2.5V through 1k Ohm.

    Customer CAN access to the registers (Read/Write) in their condition correctly, but it seems it is not reflected to the operation.

    Maybe this is because the device is in SMBus Master Mode by using 2.5V pull up voltage in 3.3V mode.
    What is the ENSBM pin voltage when left floating ?

    As the system does not have an EEPROM, the device could be waiting for data download from the EEPROM, which register setting may be disabled.

    We will see how it comes out and let you know.

    Thanks and Best Regards,
    Kawai

  • 0 in reply to Kawai
    Guru 19775 points

    Lee-san,

    Power supplying ENSMB pin from 3.3V had solved the problem.
    Thank you very much for your support.

    We need to explain why it did not work with 2.5V pull up in 3.3V mode.

    I guess there is another Vih / Volspecification for ENSMB pin.
    There is only the specification of Vih = 2.0V to VDD for LVCMOS DC Specification.

    As the pull up voltage was 2.5V, I think the device had probably recognized as SMBus = Float, which is SMBus master mode.

    Here, I have two questions.

    1. What is the electrical specification of VIH / VIL, and the float voltage for ENSMB pin ?

    2. What happens when you access registers in SMBus master mode ?
         Customer was able to read/write the registers, but are the register setting invalid ?

    Best Regards,
    Kawai

  • 0 in reply to Kawai
    TI__Mastermind 43795 points

    Kawai-san,

    There are several 4-level control inputs on the DS100MB203.  The VIH/VIL is unlike a normal LVCMOS input which should not be left floating. 

    The 4-level input pins utilize an internal resistor divider to help set the 4 valid levels. There is an internal 30K pull-up and a 60K pull-down connected to the package pin. These resistors, together with the external resistor connection combine to achieve the desired voltage level. Using the 1K pull-up, 1K pull-down, no connect, and 20K pull-down provide the optimal voltage levels for each of the four input states.

     Below is a table for the 4-level control pins.

     

    Since the device was in Master Mode and no EEPROM was present the device state machine was waiting to load EEPROM information prior to enabling the device.

    Regards,

    Lee

  • 0 in reply to Lee Sledjeski
    Guru 19775 points

    Lee-san,

    Thank you your reply.

    I understood that ENSMB pin is a 4 level input pin, which is needed to be pulled up with the voltage of the mode setting.(3.3V for 3.3V mode, 2.5V for 2.5V mode)

    It seems the datasheet description is a little bit confusing. It would be better if there is a description of "4-Level LVCMOS" in the I/O type column.

    .

    Thanks for your support.

    Best Regards,
    Kawai