DP83848C MDC-MDIO INTERFACE

Hi Ross,
at moment I can not change the PHY ID because I need to use the card with SW application that runs only with PHY ID=2.

The strap configuration is :

- pin 42 (PHYAD0) connected with a pull down resistor (value = 2.21K)
- pin 43 (PHYAD1) connected with a pull up resistor (value = 2.21K).

I think that the device address 2 is correctly read by DP83848 device but the MDIO interface doesn't respond right.

I can observe three typical situations :

a) the address is read correctly but the DP83848 registers show wrong values (in the same time the ethernet link is up)

note that the OUI value is correct but the registers value are 0xffff

=> mii info
PHY 0x02: OUI = 0x80017, Model = 0x09, Rev = 0x00, 100baseT, HDX
PHY 0x03: OUI = 0x80017, Model = 0x09, Rev = 0x00, 10baseT, HDX
=> mdio read 2 0-19
Reading from bus FSL_MDIO
PHY at address 2:
0 - 0xffff
1 - 0xffff
2 - 0xffff
3 - 0xffff
4 - 0xffff
5 - 0xffff
6 - 0xffff
7 - 0xffff
8 - 0xffff
9 - 0xffff
10 - 0xffff
11 - 0xffff
12 - 0xffff
13 - 0xffff
14 - 0xffff
15 - 0xffff
16 - 0xffff
17 - 0xffff
18 - 0xffff
19 - 0xffff
=>


b) the OUI value is wrong for PHY 0x02 (in the same time the ethernet link is up)

=> mii info
PHY 0x02: OUI = 0x3C34D6, Model = 0x12, Rev = 0x01, 100baseT, HDX
PHY 0x03: OUI = 0x80017, Model = 0x09, Rev = 0x00, 10baseT, HDX
=>



c) the BMCR register value , for PHY 0x02 (in the same the ethernet link is up), is

- initially correct
- the value change
- then the value is 0xffff and the MDIO bus is blocked (to unblock the MDIO bus is necessary to reset the PHY 0x02)


Firmware 'Microcode version 0.0.1 for P1021 r1.0' for 1021 V1.0
QE: uploading microcode 'Microcode for P1021 r1.0' version 0.0.1
In: serial
Out: serial
Err: serial
Net: eTSEC1 [PRIME]
Hit any key to stop autoboot: 0
=>
=>
=> mdio read 2 0
Reading from bus FSL_MDIO
PHY at address 2:
0 - 0x3100

=> mdio read 3 0
Reading from bus FSL_MDIO
PHY at address 3:
0 - 0x3100

=> mdio read 2 0
Reading from bus FSL_MDIO
PHY at address 2:
0 - 0x3100

=> mdio read 2 0
Reading from bus FSL_MDIO
PHY at address 2:
0 - 0x3001

=> mdio read 2 0
Reading from bus FSL_MDIO
PHY at address 2:
0 - 0x3001

=> mdio read 2 0
Reading from bus FSL_MDIO
PHY at address 2:
0 - 0x3101

=> mdio read 2 0
Reading from bus FSL_MDIO
PHY at address 2:
0 - 0x3101

=> mdio read 2 0
Reading from bus FSL_MDIO
PHY at address 2:
0 - 0x3100

=> mdio read 2 0
Reading from bus FSL_MDIO
PHY at address 2:
0 - 0xffff


Do you Know if there is a condition that can block the MDIO interface of DP83848 device ?

Could you comment me the Power-Up timing of Figure 5.1 (page 17 of data sheet) ?
The MDC clock must be delivered after the RESET ?

Thank you in advance

Regards Aniello

Hi Aniello,

Situation A does not seem like the address is read correctly. If you read all 0xFFFF, this means that the PHY did not respond to the Master's request. This is almost always because the PHY ID of the device you request to talk to does not match PHY ID in the message. The PHY can still get link and operate fine if PHY ID is not correct because you don't need register access for the PHY to operate.

What is the strength of the pull-up resistor on MDIO? 

The MDIO/MDC of the PHY should not go into any "condition that can block". The MDIO/MDC should always be accessible unless the device is not powered or in a POR.

The controller that you are using to communicate with the PHY must wait a minimum of 167ms after the PHY is powered-up.

The controller must also wait a minimum of 3uS after the PHY is brought out of RESET.

Is this being followed?

Kind regards,

Ross

Hi Aniello,

No, RESET is not required as an addition to power-up. There is an internal POR that occurs without the need for RESET. 

Can you send me a schematic? I am wondering if there might be internal pulls on your MAC that care changing the PHY ID.

Kind regards,

Ross

Hi Ross,

due to confidentiality issues I need your email.

It is important for us that the schematic does not appear on the FORUM.


I don't know the way to insert a file when the post has already been created and

and how not to make it visible on the FORUM.


Thank you in advance.

Aniello

Hi Aniello,

Please email it to me if you can.

r-pimentel@ti.com

Thank you,
Ross

Hi Ross,

I need a check about PHY's Marking codes.

Are the followings Marking Codes associated to manufacturing lots of good devices ?

N
VQ24AC
DP83848VV
VBI

N
VQ13AC
DP83848VV
VBI

N
41W0857
DP83848VV
VBI

Thank you in advance.

Kind Regards

Aniello

Checking this for you now.

Have you had a chance to change the PHY ID and try to ping other addresses?

Also, we have a tool called USB-2-MDIO that you can use to debug this issue with:
www.ti.com/.../usb-2-mdio

You would need to get an MSP430 Launchpad.
www.ti.com/.../launchpads-msp430-msp-exp430f5529lp.html

Kind regards,
Ross

Hi Ross,

I have already tried to change the the PHY ID setting to 1 the PHYAD4 (pin 46)
and also with address 0x12 the results are the same !

Kind Regards

Aniello

Hi Aniello,

There is no issue with those lots. 

Have you tried using the USB-2-MDIO tool to debug?

Have you done an ABA swap by moving the unit with the incorrect PHY ID to the other socket? Does the issue stay with the IC or the socket?

Kind regards,

Ross