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DP83620 Duty cycle distortion test failture

Other Parts Discussed in Thread: DP83620

Hi ,

Please see full details as attached.Duty cycle distortion test fail—DP83620.docx

  • Hi gan,

    Your schematic looks OK but your layout could be significantly improved.

    The first concern is the distance of the termination resistors/supply decoupling from the PHY.  The resistors AR127-AR130 should be close to the PHY, not so far away.

    The other concern is the differential routing.  The EI_TP & EI_TN traces have two different spacing for a significant portion of the trace, one of which is going to be incorrect for 100ohm differential impedance.

    The proper spacing needs to be calculated and used on the entire trace.

    Regards,

  • Hi ,
    I improved the PCB layout according to your guide, the "Eye Pattern" test pass, but duty cycle distortion test still fail. We want to know following questions:
    1、Is there any register we can configure to improve this problem?
    2 、How we can measure the 100Ω differential impedance wihch suggestted in Datasheet ?
    3、How the "Eye Pattern" effect the communication quality? Can we ignore the test result base on the fact that : packet loss do not happen during 12 hours test with 100 meters network cable.
    Thank you!
  • Hi ,
    Glad to hear that you have improved the layout and that yo see error free data transfer.
    Regarding your questions:
    1. Can you send me the duty cycle distortion results? There is no register configuration that changes this.
    2. Are you trying to confirm your routing? This is typically done while you are doing your layout because it is not an easy thing to measure. Your layout tool should have provided you the ability to do 100 ohm differential routing by setting rules based on the material you are using and the layer the routing will go on. If you did not do this and want to check, you will need to either use a Network Analyzer and collect the S-parameters and/or do TDR (time-domain reflectometry).
    3. Even if you are not completely adhering to the IEEE spec with your layout, you can get good quality transmission and reception at great distances. The spec is to ensure consistency and is by no means a dead limit in terms of error free communication. This is why you are still able to get error free data transfer. If you do not care to adhere to IEEE then you are by all means welcome to do as you please.

    Kind regards,
    Ross
  • Thanks for your reply!

    Please refer to attachment for test result.

    v0.12 y1 eth0.rtfv0.12 y1 eth1.rtf

  • Hi,

    Thank you for sending the documents over.
    What is interesting is that all the other parameters pass with relatively high margin.
    This leads me to believe that the tool you are using might have a capture issue with DCD.
    From the UNH test guide (www.iol.unh.edu/.../PMD_Test_Suite_v3.4.pdf), you can see that DCD is generally measured when the 01010101 is followed by two consecutive baseline symbols (i.e. two '0's).

    In the documents you provided, the DCD is captured when there is only a single baseline symbol. The reason for doing 2 symbols is because it 'minimizes any inter-symbol interference that would affect signal rise and fall'.

    Do you mind re-taking the measurement with 2 consecutive baseline symbols post DCD 01010101 pattern?

    Kind regards,
    Ross