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SN65CML100: Using Vbb for single-ended interface

Mark Guastaferro
Genius 11185 points
Part Number: SN65CML100
Other Parts Discussed in Thread: DS90LV011A

Can the Vbb reference voltage be used to interface the input of the SN65CML100 to a 3.3V LVCMOS single-ended input?  The data sheet describes a single-ended PECL interface, but maybe this would work with a CMOS type driver. The minimum Vih of the input signal would be 2.0V, which seems to give enough differential input margin to the SN65CML100 inputs. Vil would be < 0.8V. 

Signalling rate is 20 MHz. 

Any concerns with such an interface? 

  • 0
    TI__Mastermind 43795 points

    I would use a voltage divider off of the Vbb output.  Since the nominal Vbb = ~ 2000mV and the center of the CMOS threshold area is 1.4V, I would try to drop about 600mV from Vbb to the IN- pin (Pin B) in the voltage divider.  This arrangement would make the CML100 into a LVCMOS to differential translater.

    There are many other devices like the DS90LV011A which can do this translation automatically.

    Best Regards,

    Lee

  • 0 in reply to Lee Sledjeski
    TI__Genius 11185 points

    Hi Lee,

    Thanks for the advice on voltage dividing down the Vbb voltage for the input reference.

    With regards to something like the DS90LV011A.  The challenge in my case is that the driver needs to interface to a CML receiver on the other end of a cable interface.  The CML receiver has 50 ohm pull-ups to Vcc (3.3V) on each side of the differential signal.  Can an LVDS driver like the DS90LV011A simply interface to the CML receiver without modifying the pull-ups? The pull-up configuration on the receiver cannot be changed (including resistor values). 

  • 0 in reply to Mark Guastaferro
    TI__Mastermind 43795 points

    Hi Mark,

    I understand now.  LVDS devices can interface with CML inputs, but they would require AC coupling since the output common mode voltage is set to 1.2V.  If the 200Mbps signal is encoded or scrambled for DC balance, the AC coupling would work fine.  If the signals must be DC coupled then a device with native CML outputs is a better choice.

    Regards,

    Lee