Other Parts Discussed in Thread: TLK106
Hi !
We are using TLK106L as a PHY together with STM32F407 MCU. After several hours after PHY reset number of FCS errors for frames transmitted by PHY is rising from zero to 10-15% of total number of sent frames. After reset situation repeats, immediately after reset number of FCS errors on receiving side is 0 and then goes to 10-15%. Behaviour is the same with different models of ethernet switches.
PHY initialization sequence:
- write 0x8000 to reg0 (BMCR) - software reset
- small delay
- write 0x0000 to reg0 (BMCR) - set 10HALF mode (not really needed, caused by software structure)
- some delay
- write 0x1000 to reg0 (BMCR) - enable AutoNegotiation
- wait until Link established by polling reg1 (BMSR) bit 2(Link Status)
We are using external 50 MHz oscillator.
BR Oleg