• State TI Thinks Resolved
  • Locked Locked
  • Replies 4 replies
  • Answers 1 answer
  • Subscribers 34 subscribers
  • Views 2661 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DP83822I: ESD problem

skn
Prodigy 110 points

Part Number: DP83822I
Other Parts Discussed in Thread: TIDA-00928

Hi

We have a problem with the DP83822IRHBT when exposed to an ESD pulse as low a 6KV contact to chassis.

The problem is that it loses the connection for a couple of seconds when the instrument chassis is hit by a ESD pulse.

(The led on JS3 turns off and we can't ping it from a PC)

Below you can see the schematics:

Connector JP14 is connected directly to the Ethernet port on a ZYNQ processor.

The ZYNQ processor is not affected by the ESD pulse.

The DP83822 have exactly the same problem even if we remove the ZYNQ from the circuit (The led on JC3 still turns off for a couple of seconds).

On the same PCB we have exactly the same circuit except that DP83822 is exchanged with KSZ8895. Here we have no problems with ESD.

We have tried to place tranzorbers between DP83822 and JS3. It had no effect at all.

The question is: Why do DP83822 loos the connection and what can we do about it?

Could it be that some of the values in the many registers can be programmed to make the DP83822 more robust?

Best Regards

Søren

  • 0
    TI__Mastermind 26320 points
    Hi,

    TIDA-00928 ( Reference design for DP83822) is tested for ESD and test results are available on ti.com. Please compare the difference between your board design and layout compare to TIDA-00928.

    www.ti.com/.../TIDA-00928

    We need to look in to circuit and layout of the board to comment on the reason for failure Kindly share the layout pictures as well.

    Regards,
    Geet
  • 0 in reply to Geet Modi
    Prodigy 110 points

    Hi

    Here you have the layout of the Ethernet part of the PCB.

    The stack-up is like this:

    Layer No Layer Name Type Base Thickness
    in um    		 Thickness in um Trace
    Width / Space
    in mm    		 Target
    Impedance
    in Ohms
    L1 (A) Top Side Copper foil + plating 18 38    
        Pre-preg (1080) 78 62    
    L2 (B) Inner Layer Chassis1 Copper 35 33    
        Core 100 100    
    L3 (C) Inner Layer Gnd1 Copper 35 33    
        Pre-preg (2x1080) 156 124    
    L4 (D) Inner Layer Signal1 Copper 35 33    
        Core 100 100    
    L5 (E) Inner Layer Power1 Copper 35 33    
        Pre-preg (2x1080) 156 124    
    L6 (F) Inner Layer Signal2 Copper 35 33 0.1mm / 0.5mm 90
        Core 100 100    
    L7 (G) Inner Layer Gnd2 Copper 35 33    
        Pre-preg (2x1080) 156 124    
    L8 (H) Inner Layer Power2 Copper 35 33    
        Core 100 100    
    L9 (I) Inner Layer Signal3 Copper 35 33    
        Pre-preg (2x1080) 156 124    
    L10 (J) Inner Layer Power3 Copper 35 33    
        Core 100 100    
    L11 (K) Inner Layer Signal4 Copper 35 33    
        Pre-preg (2x1080) 156 124    
    L12 (L) Inner Layer Gnd3 Copper 35 33    
        Core 100 100    
    L13 (M) Inner Layer Chassis2 Copper 35 33    
        Pre-preg (1080) 78 62    
    L14 (N) Bottom Side Copper foil + plating 28 38    
    Total Thickness in um   1816

    And the layers starting from layer 1 to layer 14:

    And the silk screen top and bottom:

  • 0 in reply to skn
    TI__Mastermind 26320 points
    Thanks for the details. I was looking thru the schematics. The chasis ground and Phy ground are isolated using 100pF caps. Can you change it to 4700 pf HV cap. Also, I am sharing link of document outlines the ESD design guidelines. Kindly review your design with the document and see if any changes needed.


    www.ti.com/.../slva531a.pdf


    Regards,
    Geet
  • 0 in reply to Geet Modi
    TI__Mastermind 26320 points
    Closing this thread. Incase you have further queries, please open new thread and reference of this thread.