• State TI Thinks Resolved
  • Locked Locked
  • Replies 3 replies
  • Answers 1 answer
  • Subscribers 32 subscribers
  • Views 544 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DS90UB964-Q1: Pattern Generation not working

Sneha James
Prodigy 60 points
Part Number: DS90UB964-Q1
Other Parts Discussed in Thread: ALP

Hi

I am trying to enable the pattern generation feature in DS90UB964-Q1 in our SoC. I am running the following script :

# 1920*1080 @ 30 fps
# 4 x lane 800Mbps/lane
# Data Type: RAW12

# Data
#
# Hactive:1920 pixles
# Vactive:1080 lines
# Vtotal:1125 lines
# Vfront:10 lines
# Vback:33 lines
# Pixel size: 12 bits (Mipi CSI-2, Table 25 )
# Block size: 3 bytes (Mipi CSI-2, Table 25 )
# Frame rate: 30 fps
# Number of bars: 8
#
# Reset
i2cset -f -y 6 0x30 0x01 0x01
# Set CSI_TX_SPEED to select 800Mbps
i2cset -f -y 6 0x30 0x1F 0x02
#
#
# CSI sel and CSI enable
i2cset -f -y 6 0x30 0x32 0x01 # CSI0 sel and CSI0 enable

i2cset -f -y 6 0x30 0x33 0x03 # CSI_LANE_COUNT: 4, EN Continuous Clock

i2cset -f -y 6 0x30 0x20 0x30 # Disable video forwarding by setting bits [5:4] of the FWD_CTL1 register

i2cset -f -y 6 0x30 0x21 0x80 # Enable CSI Replicate Mode

# enable pat gen
i2cset -f -y 6 0x30 0xB0 0x00 # Indirect Pattern Gen Registers
i2cset -f -y 6 0x30 0xB1 0x01 # PGEN_CTL
i2cset -f -y 6 0x30 0xB2 0x01

i2cset -f -y 6 0x30 0xB1 0x02 # PGEN_CFG
i2cset -f -y 6 0x30 0xB2 0x33 # NUM_CBARS, Block_size

i2cset -f -y 6 0x30 0xB1 0x03 # PGEN_CSI_DI
i2cset -f -y 6 0x30 0xB2 0x2C # RAW12 Data Type

i2cset -f -y 6 0x30 0xB1 0x04 # PGEN_LINE_SIZE1: 1920*12/8=2880
i2cset -f -y 6 0x30 0xB2 0x0B

i2cset -f -y 6 0x30 0xB1 0x05 # PGEN_LINE_SIZE0: 1920*12/8=2880
i2cset -f -y 6 0x30 0xB2 0x40

i2cset -f -y 6 0x30 0xB1 0x06 # PGEN_BAR_SIZE1: 1920*12/8/8)=360
i2cset -f -y 6 0x30 0xB2 0x01

i2cset -f -y 6 0x30 0xB1 0x07 # PGEN_BAR_SIZE0: 1920*12/8/8)=360
i2cset -f -y 6 0x30 0xB2 0x68

i2cset -f -y 6 0x30 0xB1 0x08 # PGEN_ACT_LPF1: 1080
i2cset -f -y 6 0x30 0xB2 0x04

i2cset -f -y 6 0x30 0xB1 0x09 # PGEN_ACT_LPF0: 1080
i2cset -f -y 6 0x30 0xB2 0x38

i2cset -f -y 6 0x30 0xB1 0x0a # PGEN_TOT_LPF1: 1125
i2cset -f -y 6 0x30 0xB2 0x04

i2cset -f -y 6 0x30 0xB1 0x0b # PGEN_TOT_LPF0: 1125
i2cset -f -y 6 0x30 0xB2 0x65

i2cset -f -y 6 0x30 0xB1 0x0c # PGEN_LINE_PD1:1/(30*1125*10ns)=2963
i2cset -f -y 6 0x30 0xB2 0x0B

i2cset -f -y 6 0x30 0xB1 0x0d # PGEN_LINE_PD0:1/(30*1125*10ns)=2963
i2cset -f -y 6 0x30 0xB2 0x93

i2cset -f -y 6 0x30 0xB1 0x0E # PGEN_VBP: 33
i2cset -f -y 6 0x30 0xB2 0x21

i2cset -f -y 6 0x30 0xB1 0x0F # PGEN_VFP: 10
i2cset -f -y 6 0x30 0xB2 0x0A


DS90UB964 has been configured for RAW 12 HF, Coax mode. I2C address is 0x30(7-bit) and 0x60(8-bit).

But I am not seeing any change in registers 0x73-0x76. i2cdump result after executing the script:

$ i2cdump 6 0x30

 0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f  0123456789abcdef

00: 60 00 1e 30 c2 01 00 fe 1c 10 79 79 0f b9 00 ff `.?0??.???yy??..
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 04 02 ..............??
20: 30 80 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0?..............
30: 00 00 01 03 00 00 00 00 00 00 00 00 00 00 00 00 ..??............
40: 00 a3 01 01 00 00 00 00 00 00 00 00 00 00 02 00 .???..........?.
50: 00 00 00 00 00 00 00 00 18 00 00 00 00 00 00 00 ........?.......
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 7e 88 88 .............~??
70: 2b 2c e4 00 00 00 00 c5 00 01 00 00 20 00 00 00 +,?....?.?.. ...
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
b0: 00 0f 0a 08 25 00 18 00 8e 03 03 74 80 00 00 00 .???%.?.???t?...
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
d0: 00 43 84 27 60 f8 07 00 00 00 00 00 00 00 00 00 .C?'`??.........
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
f0: 5f 55 42 39 36 34 00 00 00 00 00 00 00 00 00 00 _UB964..........

Can anyone suggest what could be the problem?

Regards
Sneha

  • 0
    TI__Mastermind 21685 points
    Sneha,

    Couple of comments:

    a) When you have FPD RX port active then you can use Register 0x20 and map RX port data to CSI-2 TX Port. You have disabled Port 0 and Port 1 but Port 2 and Port 3 are enabled. So for testing with patgen leave 0x20 to default value.
    b) Looks to me your initializations are otherwise same as the patgen script I shared in link below

    e2e.ti.com/.../2874985

    Can you use ALP and run the above patgen script?
    c) By running 964 patgen we are testing the patgen CSI output of 964. So can you test without imager and serializer connected and also without any other initializations?

    Thanks,
    Vishy
  • 0 in reply to Vishy Viswanathan
    TI__Mastermind 21685 points
    By the way, DS90UB964 counts the number of received lines to determine line count on Line_Count_1 and Line_count_0 registers (0x73-74). I don't think these registers are updated for Patgen. Those registers are associated with the receive port and reflect the recent frame lines counted for the port. Please check on the SOC side if you are receiving something and able to display the pattern.
  • 0 in reply to Vishy Viswanathan
    Prodigy 60 points
    Thank you Vishy for replying.
    We will check and come back.