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Hello,
About a year ago, I asked a question about the DS250DF210 Generating a PRBS stream from a 10Gig/16 or 644.53125MHz clock input. We were successful with the DS250DF210, however we are having difficulty in achieving a PRBS data stream out of the DS125DF1610. We have a signal detected on the channel we want to generate a PRBS but cannot achieve lock to the incoming clock.
We were also successful at generating a PRBS stream from a device with no input signal. This is less desirable as we must touch undefined registers and reverting back to a normally working CDR Channel is problematic.
Can you provide some insight where we might look for configuration issues with the DS125DF1610?
-Jack
Hi Nasser,
1. We're trying to generate a 10.3125 Gbps PRBS-31 pattern.
2. Our input clock frequency is 644.53125 MHz clock (10.3125 Gbps/16)
3. Our Devices are embedded in our system that uses an embedded NXP Processor and an FPGA to convert Parallel bus transactions to SMBus Accesses to the CDRs. We can provide Teamviewer access to our GUI to allow you register access.
Additional Information:
We can generate a 10G PRBS Pattern if the input signal is a 10G signal. We are able to connect up a PRBS Tester to our DS125DF1610s and configure them to generate a 10G PRBS that is passed through a 12.5G cross-point switch and driven off card and received at the PRBS tester without error. However, we'd like to generate our own on-board PRBS with a 644.53125MHz clock signal. The clock source is an LVDS XO and passed through a MUX and then on to a 12.5G cross-point switch before being routed to the CDR.
The Mux is a SY58017UMG CML Mux from Microchip.
-Jack