TUSB1210: It seems output data & clock violate ULPI interface timing requirements

Hello,

One of my customer reported clock timing violation matters while applying TUSB1210 for ULPI interface w/  Zynq(xilinx).

need to clarify the definition of the Table 5-4 in the datasheet.  attached the schematic and measured waveforms for your reference.  would you please review them and advise me ?   Thank in adv. if you can mark exact measurements for Tsetup & Thold on the waveforms. 

 - measured pins :  Clock(pin 26), Data2(pin 5), DIR(pin 31) 

TUSB1210 ULPI timing.pptx