This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DS110DF410: What is REG 0x31 [4:3], "EQ_SM_FOM1" and "EQ_SM_FOM0" setting ?

Guru 19775 points
Part Number: DS110DF410

Hi Team,

Q1). What is the REG 0x31 [4:3] setting ? These bits are set to "00" by default.

Q2). Is the default setting of REG 0x31 [4:3] correct ?

I also found the similar setting for DFE in REG 0x2C [5:4], which is set to "11" instead of "00".

Best Regards,

Kawai

  • Hi Kawai-San,
    1). Yes reg 0x31[4:3] default setting is 2'b00. For CTLE adaptation, state machine uses this setting to determine whether to optimize HEO or VEO when it is adapting CTLE. For a setting of 2'b00, device actually uses HEO and VEO - like 2'b11 setting - even though the setting is 2'b00. On next revision of the data sheet, we will make this clear and remove "not valid".
    2). These are different. Rex 0x2C default = 2'b11 is for DFE FOM adaptation while 0x2C[4:3] is for CTLE adaptation. This means during DFE adaptation which one we want to optimize vertical eye opening or horizontal eye opening.
    Regards,,nasser
  • Hi Nasser-san,

    1). Yes, please modify the datasheet description to for REG 0x31 [4:3] = 2'b00.

    2). I thought both CTLE and DFE should use HEO and VEO for optimization. I was wondering why these two had the different setting.

    Best Regards,
    Kawai