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TLK10232: Error Code during Transmission

Part Number: TLK10232

Hi,

We've build a transmission system consists of Intel FPGA, optical fiber, TLK 10232 and Xilinx FPGA. The data firstly been sent from Intel FPGA to optical module by using KR. Than the optical modules on two chip transmit the data through optical fiber. The TLK10232 treceives the data from optical module then sends it to the Xilinx FPGA that on the same chip with TLK10232. The problem is that we find error code during this process. After several tests on this system, we assumed that the error code might occured at the optical module part or at TLK10232 receiving part. I'll breifly list out our tests to you to knew better of the transmission system I described.

we have another two former applications with similar contruction mentioned above and three test paths without error code.

1. Xilinx FPGA <-(XAUI)-> TLK10232 <-(KR)-> 10G optical module <--> optical fiber <--> 10G optical module <--> TLK10232 <--> Xilinx FPGA

2. Xilinx FPGA  <-(KR)-> 10G optical module <--> optical fiber <--> 10G optical module <--> TLK10232 <--> Xilinx FPGA

3. Intel FPGA  <-(KR)-> 10G optical module <--> optical fiber <--> 10G optical module <--> Intel FPGA

4. Xilinx FPGA <-(KR)-> 10G optical module <--> optical fiber <--> 10G optical module <--> Intel FPGA

5 .Xilinx FPGA <-(KR)-> 10G optical module <--> optical fiber <--> 10G optical module <--> Xilinx FPGA

All five transmission tests are all with correct functionality and without error code. Nevertheless, if I write the path with error code in format of above like "Intel FPGA <-(KR)-> 10G optical module <--> optical fiber <--> 10G optical module <--> TLK10232 <--> Xilinx FPGA"  you can easily find out that compares to the five paths mentioned above, the error could only happens at optical module to TLK10232 or at FPGA to optical module. Therefore, we want to ask you that if you have any advice or solution on this problem?

Futhermore this is our configuration of TLK10232:

07.0000 = 2000 (clode self-negotiate)

01.0096 = 0000(clode link training)

01.00AB = 0003 (open FEC)

Best Regards,

Qi

  • I've got similar problems like u, have you got any solution yet?

  • Can you please clarify this comment:  if I write the path with error code in format of above like "Intel FPGA <-(KR)-> 10G optical module <--> optical fiber <--> 10G optical module <--> TLK10232 <--> Xilinx FPGA"?

    So are you seeing the issue when you replaced the Xilinx FPGA with Intel FPGA?

    Thanks
    David

  • Hi David,

    Thank you for your reply, I'm sorry I didn't made my description clear. The system is built on two boards separately, each board has its own FPGA chip. The FPGA is either send data to the 10G optical module or receives data from TLK10232. So the description "Intel FPGA <-(KR)-> 10G optical module <--> optical fiber <--> 10G optical module <--> TLK10232 <--> Xilinx FPGA" is the path that Intel FPGA send the data to 10G optical module through KR, and then the other board's optical module receives data and send it to TLK10232, lastly TLK10232 send it to the XIlinx FPGA. And this path occurs the error code, the other five paths I listed before have no error code.

    We only have TLK10232 on the boards with Xilinx FPGA. Thus we can't test the situation that replace the Xilinx FPGA with Intel's currently. According to the five tests I listed yesterday, we have test Xilinx to Xilinx with TLK10232, Xilinx to Xilinx without TLK10232, Xilinx to Intel without TLK10232, Intel to Intel without TLK10232. Those are all correct paths without error code. We will try to find if we have other devices could test the Intel to Intel with TLK10232. Do you think is there any other factors could lead to this error code?

    Best,

    Qi

  • Hi,

    I need to look into this item and TLK settings for it. I will advise soon.

    Cordially,

    Rodrigo Natal

    HSSC Applications Engineer

  • HI,

    It is not clear to me from the description in your post where exactly within the system the error codes are occurring:

    We've build a transmission system consists of Intel FPGA, optical fiber, TLK 10232 and Xilinx FPGA. The data firstly been sent from Intel FPGA to optical module by using KR. Than the optical modules on two chip transmit the data through optical fiber. The TLK10232 treceives the data from optical module then sends it to the Xilinx FPGA that on the same chip with TLK10232. The problem is that we find error code during this process. After several tests on this system, we assumed that the error code might occured at the optical module part or at TLK10232 receiving part. I'll breifly list out our tests to you to knew better of the transmission system I described

    it seems like errors might be on the optical ingress path. If that is the case, have you enabled the PRBS checker function on the TLK receiving from optical module to see whether errors are observed as well as PRBS checker on the Xilinx FPGA receiver?

    Cordially,

    Rodrigo Natal

    HSSC applications engineer

  • Hi Qi:

        Do you still have questions?

    Regards,

    Brian