To the person concerned.
It is first time to use TI 10G PHY. So I'd like to hear your opinion on what I should be careful about XAUI to SFI/XFI.
When I read the datasheet, In order fo user to set up XAUI to SFI/XFI, It is required to set a couple of register to disable auto-negotiation and link training.
Related registers which I think are as below
CHANNEL_CONTROL_1 (register: 0x0001) (default: 0x0B00) (device address: 0x1E) : BIT 14 LT_TRAINING_CONTROL
AN_CONTROL (register = 0x0000) (default = 0x3000) (device address: 0x07) BIT 12 AN_ENABLE
Do you think they are enogh to set SFI/XFI ?
in addition, Could you give your guide for PLL multiplier setting for HS and LS side?
Registers for Multiplier configuration Which I think are with 156.25 reference clock
-> HS side :HS_SERDES_CONTROL_1 BIT 4, [3:0] HS_ENPLL, HS_PLL_MULT[3:0] --> b'1 , b'1100 respectively
--> LS Side : LS_SERDES_CONTROL_1 BIT 4, [3:0] LS_ENPLL, LS_MPY]3:0] -->b'1 , b'0101
Do you think I need to consider other registers for normal operation ?
thank you
Best Regards
Mark Kim