TCA9539-Q1: query for IRQ control register about IRQ level or triggering method

Hi Minwoo,

The #INT pin for TCA9539  is an indicator that the state of an input pin differs from the value stored in the input register. This interrupt is only active until the input status register is read or the state of the pin returns to its original value. Based on this description, the waveform in the figure that you shared is expected if the host SoC has read the input status register after the first IRQ (cleared INT so it returned high). The following IRQs do not trigger the #INT pin because the state of the input pin does not change from the state it was in when the input register was last read. Please refer to section 8.3.3 on the datasheet for a full description of this feature.

q1) GPIO expander can make IRQ output about every rising / falling edge, in default register setting ? 
Yes, TCA9539's interrupt system is edge based and will trigger the #INT pin when the input state changes from what is stored in the input register. This only occurs for pins that are configured as inputs. Pins configured as outputs cannot trigger interrupts.

q2) If the IRQ of slave IC (GPIO expander input) keeps going on LOW, GPIO Expander cannot make IRQ output ? 
The interrupt will remain active until the input register is read through I2C or the pin state returns to its original value. #INT will not assert again until an input pin state changes from its value when the register was last read. 

q3) is there any recommendation for related register ? 
All input states can be assumed to stay the same until the #INT pin is asserted. Using this assumption, the SoC can assume that Slave IC IRQ is continued to be asserted LOW if the last read of TCA9539 reflected a LOW and #INT does not re-assert after expected time for IRQ to de-assert. 

Let me know if this makes sense.

Regards,
Eric