Hi team,
Customer tested two input, one has a common mode level of 2.91V measured at the TFP401 input, and another has a common mode level of 3.05V measured at the TFP401 input,
and AVDD = 3.3V.
1. What is the risk when common mode resonance does not meet the chip requirements? What are the undesirable consequences? 2. What is the probability of risk? 3. Does the chip have an interface to adjust the common mode?
4. Could customer adjust the AVDD to 3.0V? Thanks.