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HDMI to LVDS single/dual link

Ville Keskilohko
Prodigy 190 points
Other Parts Discussed in Thread: DS90C3201, TFP401A, DS90C387A, TFP401, DS90C187, DS90C387

Hello,

I'm currently designing a monitor solution for HDMI/DVI (no audio). I would have to support both 1280x800 pixel single-link LVDS display and 1920x1080 pixel dual-link LVDS display with the same electronics.

Since TI doesn't have single-chip solution, I was planning to use TFP401A for receiver and then DS90C3201 for LVDS serialization to display. For dual-link this seems quite straightforward, just connect TFP401A odd pixel outputs to DS90C3201 odd-pixel inputs and the same for even pixels. However, TFP401A uses even-pixel outputs in 1-pixel/clock mode, but DS90C3201 uses odd LVDS ports (odd-pixel TTL inputs). This would mean that I would need to design two different boards: one with direct odd-odd and even-even connection (dual-link) and one with even-odd connection (single-link). Have I understood the specifications correctly? Is there any way around this?

If I have understood correctly, DS90UB949/DS90UB948 combination might do what I'm looking for, but the ICs are much more expensive, you can get even single-chip Analog Devices ADV7613 HDMI to LVDS bridge with less.

Best regards,

/ Ville

  • 0
    TI__Guru** 102025 points

    Hello Ville,

    We have a guide on how to perform this conversion here: http://www.ti.com/lit/an/slla325c/slla325c.pdf?ts=1587745812546

    DS90C387A can be used for dual channel RGB to LVDS which probably provides the cleanest solution. One board can be used for either 1280x800 or 1920x1080

    Best Regards,

    Casey 

  • 0 in reply to Casey McCrea
    Prodigy 190 points

    Hi Casey,

    I had read this app note earlier and I believe TFP401A/DS90C387A has the same issue as DS90C3201 that I tried to clarify in my earlier post.

    In the app note you are referring to the DVI side odd TTL outputs (QO0, QO1...) are connected to 387A odd inputs (B10, B11...) and even outputs (QE0, QE1...) to the even inputs (B20, B21...) according to app note table 4. This is fine for dual-link LVDS (48-bit TTL input).

    However, in 1-pixel/clock mode (PIXS low), TFP401A outputs data on even pixel outputs only, odd pixel outputs are not used in 1-pixel mode. Now, TF401A even outputs are still connected to 387A even inputs starting from B20 (same PCB). Configuring DS90C387A for single pixel panel by grounding DUAL pin disables A4-A7 and CLK2, which get their input from even inputs. To clarify this, I've attached the table 4 from app note and crossed out the not used outputs and inputs.

    So the problem is TFP401A, which outputs data on even outputs in single pixel mode, not on the odd outputs, which the 387A uses as inputs in single pixel mode. Everything would be ok if TF401A would use odd pixel outputs in single pixel mode, but it doesn't.

    Have I got something wrong here or is it just so that this combination can't be used for both single- and dual pixel modes just by using control signals (PIXS, DUAL)?

    Regads,

    / Ville

  • 0 in reply to Ville Keskilohko
    TI__Guru** 102025 points

    Hello Ville,

    Ok I see the issue now. I think your analysis is correct. Here's another alternative idea for you.:

    DVI -> TFP401A (single pixel mode) -> DS90C189 (single or dual pixel output mode) -> LVDS

    DS90C189 can support up to 105MHz in SISO mode which can support the 1280x800 single LVDS screen. 

    DS90C189 can support up to 185MHz in SIDO mode which can support the 1920x1080 dual LVDS screen

    TFP401A can support up to 165MHz in single pixel output mode which can support both of the above configurations. So you can simply connect the EVEN (single link) outputs of TFP401 to the single link inputs of DS90C189 (odd inputs). But it won't matter because the link between TFP401 and DS90C189 is always single link. 

    Best Regards,

    Casey 

  • 0 in reply to Casey McCrea
    Prodigy 190 points

    Hi Casey,

    That's an interesting idea. Do you know has anybody done this before for full-HD resolution at 60Hz?

    Our full-HD dual-link LVDS display clock frequency is 73MHz, which in single pixel mode would mean 146MHz, still within TFP401A specs.

    DS90C189 and similar DS90C187 (about half the price) can both support SIDO. Unfortunately, they both use 1.8V Vdd and are not 3.3V tolerant so I would need to add fast level shifter or try if plain voltage divider in each signal would work.

    3.3V DS90C387 can also be configured to SIDO mode with DUAL pin. The datasheet is a bit unclear about max clock frequency. In the description there's mention "32.5 to 112/170MHz clock support", but at the same time "the maximum pixel clock rate is increased to 112 MHz".

    In the electrical characteristics there's TCIP (TxCLK IN Period) parameter. Minimum for SISO and DIDO modes is 8.928ns (112MHz) and for SIDO 5.88ns (170MHz). Can you confirm that is it ok to operate DS90C387 with up to 170MHz input clock in single-in/dual-out configuration as this would save me from using level shifter and also the 1.8V regulator?

    Do you know if there is any suitable evaluation kit etc. that could be used to confirm operation before doing the design?

    At the same time, can you confirm TF401A and DS90C387 life cycle as these seem to be quite old ICs?

    Regards,

    / Ville

  • 0 in reply to Ville Keskilohko
    TI__Guru** 102025 points

    Hello Ville,

    I am not familiar with any customer designs for exactly this but based on the device specs it should be viable. 

    DS90C387 can support up to 112MHz in SISO mode and up to 170MHz in SIDO mode so I think it would be suitable to do the following:

    DVI -> TFP401A (single pixel mode) -> DS90C189 (single or dual pixel output mode) -> LVDS

    Unfortunately we do not have EVMs available for these devices but we are not planning to EOL these devices any time soon so they would be suitable for new designs. 

    Best Regards,

    Casey