TI E2E support forums
TI E2E support forums
  • User
  • Site
  • Search
  • User
  • E2E™ design support >
  • Forums
    • Amplifiers
    • API solutions
    • Audio
    • Clock & timing
    • Data converters
    • DLP® products
    • Interface
    • Isolation
    • Logic
    • Microcontrollers
    • Motor drivers
    • Power management
    • Processors
    • RF & microwave
    • Sensors
    • Site support
    • Switches & multiplexers
    • Tools
    • Wireless connectivity
    • Archived forums
    • Archived groups
  • Technical articles
  • TI training
    • Tech days
    • Online training
    • Live events
    • Power Supply Design Seminar
  • Getting started
  • 简体中文
  • More
  • Cancel
Interface

Interface

Interface forum

  • Mentions
  • Tags
  • More
  • Cancel
  • Ask a new question
  • Ask a new question
  • Cancel
Texas Instruments (TI) Interface support forum is an extensive online knowledge base where millions of technical questions and solutions are available 24/7. You can search interface IC content or ask technical support questions on everything from ESD protection to interfacing with USB, Ethernet, and HDMI. Find the right solution for your circuit design challenges by using our TI E2E™ support forums that are supported by thousands of contributing TI experts.
Frequent questions
  • [FAQ] How can I ensure a successful PCIe Gen5 design?

    Nicholaus_Malone
    Nicholaus_Malone
    3 Tips for a successful PCIe Gen5 design With PCIe datarates increasing to 32Gbps in the latest PCIe Gen5 specification, PCIe has allowed for data higher throughput than ever before. Unfortunately, higher data rates can also mean more signal integrity…
    • Answered
    • over 4 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83867CR: How to generate free-running 125MHz clock from DP83867?

    Vikram Sharma
    Vikram Sharma
    Part Number: DP83867CR To generate free running clock of 125MHz on the CLKOUT pin of DP83867 (synced with local reference clock on XI pin) : program register 0x0170[12:8] = 01000
    • over 4 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83867CR: How to generate recovered clock using DP83867?

    Vikram Sharma
    Vikram Sharma
    Part Number: DP83867CR To generate clock in sync with the link-partner (recovered clock of 125MHz or 25MHz) on the CLKOUT pin of DP83867 : program register 0x0170[12:8] = 00000 for 125MHz program register 0x0170[12:8] = 00100 for 25MHz Note…
    • over 4 years ago
    • Interface
    • Interface forum
  • [FAQ] ESD and TVS Protection Devices: All Technical Documentation

    Chris Murphy
    Chris Murphy
    Application Notes Protecting Automotive Can Bus Systems from ESD Overvoltage Events ESD and Surge Protection for USB Interfaces Automotive SerDes ESD Protection MSP430 System-Level ESD Considerations (Rev. B)…
    • over 4 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83TD510E: Can we use a transformer instead of Capacitor for AC coupling on the MDI side for DP83TD510?

    Hillman Lin
    Hillman Lin
    Part Number: DP83TD510E Yes, transformer can be used for filtering out the DC signal when the data is passing through the MDI side. In fact, we use transformer to filter out the AC signal in the Power over Data Line (PoDL) application. Here are the…
    • over 4 years ago
    • Interface
    • Interface forum
  • [FAQ] What is the difference between RMII slave signaling and RMII master signaling?

    Hillman Lin
    Hillman Lin
    RMII slave signaling is connecting 50MHz Crystal to two XI pin of the PHY and/or MAC RMII master signaling is connection 25MHz Crystal to one Master and provide a 50MHz reference lock through REF_CLK pin to the XI pin of the slave side. Slave side does…
    • over 4 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83TC812R-Q1: How can I connect PHYs back to back over RMII?

    Hillman Lin
    Hillman Lin
    Part Number: DP83TC812R-Q1 There are two type of mode that RMII can support: RMII normal mode and RMII Repeater mode: RMII normal mode is also known as MAC to PHY RMII connection. This mode is set as default mode in DP83TC812 so it did not need…
    • over 4 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83TC811S-Q1: Why is Slave/Managed mode PHY linking up with Master/Autonomous PHY link partner?

    Gerome Cacho
    Gerome Cacho
    Part Number: DP83TC811S-Q1 Other Parts Discussed in Thread: DP83TC811R-Q1 When using DP83TC811S-Q1 (or DP83TC811R-Q1), and setting the PHY into managed mode as a slave device via bootstrapping settings, if this device is connected to a master link partner…
    • over 4 years ago
    • Interface
    • Interface forum
  • [FAQ] DS90UH949-Q1: Disable HDCP to work with UB Deserializer

    Alex Reid1
    Alex Reid1
    Part Number: DS90UH949-Q1 Hello, My customer would like to use DS90 UH949 -Q1 devices in place of the DS90 UB949A -Q1 to keep production running. In reviewing the details they have the following questions. Can the HDCP function be disabled? If…
    • Answered
    • over 4 years ago
    • Interface
    • Interface forum
  • [FAQ] Why am I getting "clause-45 not supported" and "error-95" errors with PHY drivers?

    Vikram Sharma
    Vikram Sharma
    Possible reason can be : - "phy_read_mmd" and "phy_write_mmd" are not supported in your kernel version (if version is old). Possible solution to be evaluated : - Change "phy_write_mmd" to "phy_write_mmd_indirect" function and do the corresponding…
    • over 4 years ago
    • Interface
    • Interface forum
<>

View FAQ threads
  • Tags
  • RSS
  • More
  • Cancel
  • Suggested Answer

    SN65DSI84-Q1: The DSI data CRC error detection mechanism and the potential causes in the DSI source 0 Locked

    829 views
    17 replies
    Latest over 1 year ago
    by Jack Scherlag
  • Answered

    DP83TD510E: Link delay and frame-to-frame jitter 0 Locked

    368 views
    1 reply
    Latest over 1 year ago
    by Vivaan Jaiswal
  • Suggested Answer

    THVD4411: Design Questions 0 Locked

    276 views
    1 reply
    Latest over 1 year ago
    by Eric Hackett
  • Not Answered

    DP83867IS: DP83867IS: DP83867ISRGZ issue 0 Locked

    352 views
    3 replies
    Latest over 1 year ago
    by David (ASIC) Liu
  • Not Answered

    TUSB212: TUSB212 lead to QC charging fail 0 Locked

    536 views
    11 replies
    Latest over 1 year ago
    by Ryan Kitto
  • Suggested Answer

    TCAN1057A-Q1: Storage condition 0 Locked

    248 views
    1 reply
    Latest over 1 year ago
    by Michael Ikwuyum
  • Suggested Answer

    TLIN1021A-Q1: Temperature range 0 Locked

    276 views
    1 reply
    Latest over 1 year ago
    by Michael Ikwuyum
  • Suggested Answer

    DS90UB954-Q1: FIT rate / error mode distribution 0 Locked

    221 views
    1 reply
    Latest over 1 year ago
    by Darrah Merillat
  • Suggested Answer

    TPD1E10B06: S/O: 348782 0 Locked

    263 views
    1 reply
    Latest over 1 year ago
    by McKenzie Eaker
  • Not Answered

    HD3SS6126: Could u help to provide HD3SS6126RUAR CAD schmetic and PCB file ? 0 Locked

    188 views
    1 reply
    Latest over 1 year ago
    by Rami Mooti1
  • Suggested Answer

    LM25183: Isolated power supply solution 0 Locked

    441 views
    1 reply
    Latest over 1 year ago
    by Manuel Alva Hernandez
  • Answered

    TUSB8042A: [Consultation] USB HUB Cascade Design Check 0 Locked

    599 views
    11 replies
    Latest over 1 year ago
    by Brian Zhou
  • Not Answered

    TCAN1043A-Q1: power saving issue 0 Locked

    262 views
    1 reply
    Latest over 1 year ago
    by Ethan Sempsrott
  • Not Answered

    TUSB217A: TUSB217A 0 Locked

    206 views
    1 reply
    Latest over 1 year ago
    by Ryan Kitto
  • Not Answered

    TUSB8020B-Q1: USB Hub is not being detected. 0 Locked

    1400 views
    16 replies
    Latest over 1 year ago
    by Brian Zhou
  • Answered

    TCA9548A: Pull up Resister 0 Locked

    232 views
    1 reply
    Latest over 1 year ago
    by Clemens Ladisch
  • Answered

    DS25BR440: Buffer >3.125GBps 0 Locked

    265 views
    1 reply
    Latest over 1 year ago
    by Vishesh Pithadiya
  • Answered

    USB-TO-GPIO2: Thermal Rating 0 Locked

    222 views
    1 reply
    Latest over 1 year ago
    by Britton Jones
  • Answered

    TUSB217A-Q1: DP/DM internal or external bypass? 0 Locked

    297 views
    1 reply
    Latest over 1 year ago
    by Ryan Kitto
  • Suggested Answer

    TUSB320: Questions about interfacing AM6442 SoC with TUSB320 for TYPE C OTG connectivity +1 Locked

    1006 views
    6 replies
    Latest over 1 year ago
    by Vishesh Pithadiya
<>