In this post I explain the main differences between the two most commonly applied ESD standards, the human-body-model (HBM) and the IEC 61000-4-2 standard.
There are two main categories of ESD: component-level ESD and system-level ESD.
Component level ESD ratings are necessary in the manufacturing environment where component assembly, packaging, and shipping can cause ESD damage to a single device. Here the human body model (HBM) is applied, simulating a charged person’s discharge through the device under test (DUT) to ground,
Component handling is performed in a controlled ESD environment through the application of ESD protective gear, which drastically reduces the ESD stress upon a device. Hence the HBM test presents a soft ESD test.
System level ESD ratings are required in the uncontrolled end-user environment, where a charged user can subject a device to ESD levels of up to 40kV by touching connector pins when plugging or unplugging cables.
To better rate a system’s ESD vulnerability the IEC 61000-4-2 standard was developed, replicating a charged person discharging via a metal object, such as a screw driver, into a grounded electrical system.
Differences between HBM and IEC 61000-4-2
The main differences between HBM and IEC 61000-4-2 are the number of strikes applied during testing and of course the generator models (Figure 1), which create differences in the waveforms’ rise times and peak currents (Figure 2).
Figure 1. ESD generator models according to HBM (left) and IEC 61000-4-2 (right)
The pulse rise times differ largely. The rise time of a HBM strike can extend up to 25ns when discharging into a 500Ω resistor, while the rise time of an IEC 61000-4-2 strike is less than 1ns. An ESD protection circuit designed for a HBM strike might not turn on when exposed to IEC-ESD strikes and the device or system to be protected becomes damaged.
The amount of peak current is critical to whether a component survives an ESD strike. It is possible for an IC to survive an 8kV HBM strike but fail at a much lower, 2kV IEC-ESD strike.
The number of ESD strikes in the HBM specification is limited to a single positive and a single negative strike, whereas IEC 61000-4-2 requires a minimum of 10 positive and 10 negative strikes. During a HBM test it is therefore possible to survive the first strike but fail on subsequent strikes due to damage sustained in the first strike.
Figure 2. Waveform comparison between HBM and IEC 61000-4-2 ESD strikes for 16 kV
Measurements have shown that:
- for equal test voltages the energy of an IEC-ESD pulse is 7.56 times higher than that of a HBM-ESD pulse:
EIEC / EHBM = 7.56 (1)
- and for equal energy content, the ratio of HBM to IEC ESD test voltage is .
VHBM / VIEC = 2.75 (2).
Thus, if you have an IC that passes 16 kV IEC-ESD strikes, per Equation 2 the same device will pass a HBM test voltage of 44 kV. However, the opposite cannot be assumed. A 44kV HBM ESD cell might fail lower IEC test voltages because it's simply not enough to catch the short front time of an IEC ESD pulse.
Conclusion
Be aware of misleading ESD specifications in component data sheets, because end user applications are subjected to many ESD strikes during their lifetime. Making an informed component choice based on properly specified ESD ratings can make all the difference between your design and your competitor’s system reliability.
In general you can assume that devices complying with the IEC 61000-4-2 standard indicate this fact, while those that don’t are commonly tested to the HBM standard.
All the best,
Thomas