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TLK10232: Functionality questions of the development board.

Theodore mcclure
Prodigy 10 points
Part Number: TLK10232

Since I can’t find any schematics on this development board I wanted to know if there is a connection between the SFP housing and the input.  For example, my specific  case would be to convert a 10GBASE-KR signal coming directly from a backplane. I have the backplane signals coming out from a VPX chassis to SMA connectors.  I want to take those SMA connectors with the 10GBASE-KR signal and convert it to a fiber media through the SFP+ housing I see on the development board.  I wasn't sure if this was possible.

  • 0
    TI__Mastermind 19135 points

    Hi,

    The development board user's guide contains all of the details.

    www.ti.com/.../sllu180.pdf

    See excerpt below from the doc:

    10 Test and Setup Configurations

    More detailed test setups and descriptions will be added in future revisions of this document.

    The TLK10232 EVM has an SPF+ optical module cage attached directly to the channel A high-speed signals with approximately 3 inches of trace over Rogers Low-Dielectric material. Channel B’s high-speed signals are attached to edge launch SMA connectors with 0.1-µF AC-coupling capacitors on the RX lines, and 0-ohm resistors on the TX lines to facilitate an external loopback configuration with only a single set of capacitors in line. The caps or resistors should be carefully reworked as necessary to facilitate the test needs during evaluation. Placing two 0.1-µF AC-coupling capacitors can result in lower performance and greater numbers of bit errors.

    All low-speed signals on the input signals have 0.1-µF AC-coupling capacitors and are routed to a Samtec SEAF board-to-board connector that will mate with either a SMA breakout board for use in parametric and lab testing, or a Spartan-6 FPGA board for system-level evaluation. The output signals are connected to

    0-Ω resistors allowing them to be connected to the AC-coupled input signals. These 0-Ω resistors could be easily re-worked with 0.1-µF capacitors for AC-coupled applications.

    The MDIO bus that is connected to the TLK10232 is also routed to the SEAF board-to-board connector and can be used to interface with either the FPGA or an external system board via the post level shifter

    MDIO signal header on the SMA breakout board.

    Cordially,

    Rodrigo Natal

    HSSC Applications Engineer