SN74LVC2G07: out of input transition rise rate

Hello,

The issues with slow inputs are explained in this FAQ: How does a slow or floating input affect a CMOS device? 

The short answer is - yes, this presents a risk of reduction in reliabilty and possibly oscillatory outputs. Typically with an open-drain device, the oscillations at the output are not visible because the output transitions are so slow. In this case, the only issue is reduction in reliability. We don't have any data that shows how much this will affect reliability, so I don't have any way to predict a failure rate or time.

user4979989 said:

the input signal is 33.6us/1.2V = 28000ns/V.

Before I present solutions -- can you verify if they are operating the device at 1.2V? The LVC family only supports 1.65V to 5.5V operation.

Do we have a schematic and/or scope shots of operation?

Hi Emrys,

SN74LVC2G07DCKR VCC pin and input signal are 3.3V level.

Not sure if we have pin to pin part, open-drain output but with Schmitt-trigger input 2-ch buffer?

I checked and seems we only have push-pull output SN74LVC2G17DCKR?

Thank you.