SN74AUP1G74: SN74AUP1G74DQER Behavior

Bard Ciou

Part Number: SN74AUP1G74

Dear Team,

please reference below schematic , may we know the pin-6 will active high while VCCRTC_3P3 is ready?

it's application for PRE# and CLR# only.

Regards,

bard

0 Clemens Ladisch over 2 years ago

Guru 259800 points

The /CLR input is active low, i.e., the flip-flop is clear until the capacitor has been charged.

0 Huang teng shien over 2 years ago

Hello!

My test is that pin5 Q would be keep at low state when VCC power ready. Must trigger PRE# to low then pin5 Q would turn to high.

0 Emrys Maier over 2 years ago in reply to Huang teng shien

Hello,

Yes, if your CLR\ input is LOW at startup, then Q will remain low until PRE\ is driven low. This is described in the function table for the device:

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