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SN74LVC126A: fan-in current/drive requirements

Part Number: SN74LVC126A

I have a question concerning the SN74LVC126A quadruple bus buffer gate.

I’d like the enable all four of the buffers for this part as well as three more of these IC’s. 

Can you tell me what the  are for these devices?

 

It’s a very low speed application so propagation delay is not an issue.

 

There is a parameter that calls out ±20uA for full temp range but I’m not if that is what I am looking for.

  • Hi Michael,

    I'm not exactly sure what you're looking for, there was a typo in your question. The Iin the datasheet is the leakage current at the inputs of the device. 

    Regards,

    Sebastian 

  • No problem.  

     

    Let’s say for example, I want to turn on a bunch of transistors using a single logic buffer. 

    Each transistor requires some base current to turn on so if I keep adding transistors out there I will eventually over-current the logic buffer since it’s drive capability is limited.

     

    In my case, I’m turning on the enables and/or putting a logic high on the inputs of the buffers in a single or several SN74LVC126A’s.

     

    I guess it really just boils down to how much maximum leakage current there is into each enable and each buffer for the SN74LVC126A.

     

    Does the II listed in the datasheet include both the OE pins and the buffer inputs? 

  • II is the maximum leakage current per pin, and applies to all inputs (/OE and A).

  • Let’s say for example, I want to turn on a bunch of transistors using a single logic buffer. 

    Hey Michael,

    Your primary concern should be in regards to the transient condition and the total capacitance connected to the buffer. The input leakage generally won't be a limiting factor.

    An LVC device is rated to drive about 50pF (check the datasheet for the specific device in the "Switching" section). You can exceed that a little bit before we recommend adding a series limiting resistor at the output to prevent damage.

    -

    Just for additional explanation -- I like to think of it this way:  if I were to hook a 1F capacitor to the output, the device would essentially see a short to ground at startup and would output max current / blow itself up long before the capacitor was charged. Adding a series resistor will prevent damage to the device in this case -- although it would take a long time to charge that 1F cap, at least it wouldn't damage the buffer. So, there must be a capacitance between the tested value (50pF) and this crazy value of 1F that will cause damage -- the best way to avoid it is to either stay within the tested range, or add a current limiting resistor at the output to prevent damage.