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SN74HC193: Stretch pulse

Carlo
Expert 7715 points
Part Number: SN74HC193
Other Parts Discussed in Thread: CD74HC193

Hello E2E,

Our customer has a question about stretching the pulse of the SN74HC193, here are the details:

I am using 2 SN74HC193M in cascade to make a modulo 53 counter and the countdown is being clocked and the up is tied high. The terminal count down is connected to the parallel load inputs on both counters with the data inputs set to (msb first) 0011-0101 for a count of 53 but it is counting by 33 instead. The datasheet says that it should work with no external components but it does not work that way.

But just to clarify further I see that the minimum pulse width at the NOT Load input is 30ns but the terminal count down is only low for 26ns since the load function is async. How do I stretch the pulse?

I added a 150pf cap on the load inputs and now it is close it is dividing by 54.

The delay maybe too long and so it misses the first clock down.

The only thing is that the datasheet says they can be cascaded with no external components. BTW the TTL version works fine but the current drain is much too high for my application.

Thank you for the help.

Regards,
Carlo

  • 0
    Guru 257650 points

    Please show the schematic.

  • 0 in reply to Clemens Ladisch
    TI__Expert 7715 points

    Please refer to the attached schematic. The data inputs (D1 D2 D4 D8) are to set the modulo form 53 to 62 by inputting the binary numbers 0 to 9.

    SYNTHESIZER LOGIC 4-27-22.pdf

  • 0
    Guru 257650 points

    When counters are cascaded, they are no longer exactly synchronous. Apparently, the "no external components" in the datasheet applies only to circuits that count through all 256 states.

    How large is the difference of the length of the traces between TCD and the two /PLs?

    Try using the CD74HC193 instead of the SN74HC193.

    You want to delay only the rising edge of TCD. Insert a resistor in parallel with a diode in the line before the capacitor.

  • 0 in reply to Clemens Ladisch
    TI__Genius 16585 points

    Hello,

    Here is the response from the same customer:

    His layout of the two 74HC193s are within ½ inch of each other and so are the traces for the TCD and PL*. Right now it is rather hay wired because of all of the fixes he have tried. At this point he have it working by adding a 150pf cap shunt to ground on the TCD and PL* but he is worried about temperature effects once the unit is mounted in the box which probably reaches 100 degrees F after a few hours.

    He would appreciate a schematic of the resistor and diode fix that you suggest.

    As suggested the “no external components” only applies to the full count of 256 (255 to 0) but he's afraid would be not that useful. He need the count of 53 to 62. With a 100KHz reference that will give him the same 5.3 to 6.2 MHz injection frequency steps in the original General Dynamics design. It used 10 crystals and a mixing of sidebands to correct the individual crystal frequencies.

    He is working on replacing the crystal oscillator and sideband correction used in the Navy R1051C/URR receiver 100KHz synthesizer with a modern PLL. The original design components have aged and is causing considerable incidental FM resulting a number of beats and tweets in the recovered audio which is really poor (I can see why the radio was scrapped).

    He is surprised that the TTL version works as is with no issues and the only issue is the current drain which is too high to work with the original 20V series pass regulator. The 7805 would need a considerable heat sink to provide the TTL with 5VDC from the 20VDC basic supply the receiver has. The HCmos version does not stress the 7805 regulator.

    Appreciate your feedback guys.

    Thanks and regards,

    Art

  • 0 in reply to Art Mecina
    Guru 257650 points

    This circuit slows down only the rising edge:

    TTL devices have a higher propagation delay, so there is more time before TCD gets deactivated again.