SN74ACT04: ACT output during power up

zrno soli

Part Number: SN74ACT04
Other Parts Discussed in Thread: CD74ACT138, SN74LV138AT, SN74CBT3251, SN74AHC541, TCA6408A

Hi,

Want to know output state at power up for ACT logic. For example if ACT04 input A is tied to GND (low), what will be situation on output Y (should be high) during power up (VCC from 0V to 5V) sequence?

Thanks

over 1 year ago

+1 Sebastian Muriel over 1 year ago

TI__Genius 13660 points

Hi Zrno,

While the supply voltage is outside the recommended operating conditions, below 4.5V, the behaviour cannot be guaranteed. The only way to get guaranteed output behaviour during power-up is a device with /OE input (3-state output).

Regards,

Sebastian

+1 Clemens Ladisch over 1 year ago

Guru 244370 points

Below the minimum recommended supply voltage of 4.5 V, correct operation is not guaranteed, i.e., the output might be high or low or off.

To ensure a known state during power up, use a device with /OE input, and enable it later.

0 zrno soli over 1 year ago in reply to Clemens Ladisch

Guru 33653 points

Clemens Ladisch said:
the output might be high or low or off

Is there any device output scope screenshot for this situation (power on), anywhere?

Is part like CD74ACT138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS, with OE pin exist?

0 Sebastian Muriel over 1 year ago in reply to zrno soli

TI__Genius 13660 points

Hi zrno,

We have no 3-to-8 line decoder/demultiplexers with OE pins. The SN74LV138AT features I_off (Partial-Power Down Mode Operation). Below is what the typical output structure of a device with the Ioff feature would look like. It is not a full disconnect, if you need a full disconnect you need a device with 3-state outputs.

Regards,

Sebastian

0 zrno soli over 1 year ago in reply to Sebastian Muriel

Guru 33653 points

Just to clear it up, let's take this power up condition with SN74LV138AT...

A = B = C = pulled to GND with resistors

G1 = tied to VCC

G2A = G2B = tied to GND

Y0 output should be equal to VCC, others Yx GND

After system is turned on, VCC is going from 0V to 5V. What will be state with device outputs during this period?

I also found SN74CBT3251, but it requires more surrounding components on PCB in my setup, so prefer 138 with no glitches during power up.

Thanks

EDIT:

My question is similar to this...

https://e2e.ti.com/support/logic-group/logic/f/logic-forum/669758/sn74lv06a-output-behavior-during-power-off

and I guess that answer is the same. That nobody knows what is going on with device output during power on sequence until VCC reach 4.5V.

0 Clemens Ladisch over 1 year ago in reply to zrno soli

Guru 244370 points

All devices without /OE can have glitches at power up.

You could add a buffer with /OE (e.g., SN74AHC541) after the '138, or design the rest of the circuit that it has a reset state.

0 zrno soli over 1 year ago in reply to Clemens Ladisch

Guru 33653 points

If all devices without /OE have have glitches at power up, than I will use SN74CBT3251. To not open another topic related to this device, I writing question here, because topic is the same. Here is functional diagram from device datasheet...

/OE pin is like any other Sx, so if with any combination of /OE, S0, S1, S2, 4 input and gate result is false related FET connection A - Bx will be in Hi-Z. Also during powering on / off (VCC rising from 0V to 5V, or VCC falling from 5V to 0V)?

0 Clemens Ladisch over 1 year ago in reply to zrno soli

Guru 244370 points

Please note that CBT devices were designed for TTL signals and do not pass through voltages near 5 V.

0 zrno soli over 1 year ago in reply to Clemens Ladisch

Guru 33653 points

Finally, found it. TCA6408A with separated interface / input voltage supply (down to 1.65V) from port output (up to 6.5V). From device datasheet...

- Power Up With All Channels Configured as Inputs

- No Glitch On Power Up

It also can be hold in reset (output Hi-Z) together with interface supply...

e2e.ti.com/.../2856947

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SN74ACT04: ACT output during power up