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SN74LVTH125: Source current damage threshold on short to gnd fault.

Part Number: SN74LVTH125

Hi,

Under the specification document, I do not see a value given for the damaged current if the output drive is high and the output is shorted to ground or connected to a low-impedance sink.

Under absolute maximum ratings, I see an entry for "Current into any output in the high state (see note 2)" which is specified for when you are driving the output high but your sink is higher (Vo > Vcc) so that would be a current sink into the sn74lvth125.

I also see the entries for max sink current when the output is LOW so the nominal case where the IC is sinking the current coming in.

But I don't see any mention of the max source current that would cause damage.

I do see the entries about recommended ratings and that's fine, we are just interested in failure downstream causing damage to the part as it will be driving an external gpio pin. so a user could be silly and short it to the ground.

Under stress test we do see that at 64mA the current seems to clamp and the drive voltage drops to compensate, in the same way a constant current source would do. So would it be true to assume the chip is self-stable at 64mA and no damage would occur as would be the case of a constant current source?

Thanks for your time.

  • Hi Anton,

    The recommended ratings is what you are looking for actually. Anything past recommended ratings on a datasheet, TI has no guarantee of performance or reliability. 

  • Hi Albert,

    Thanks for the response.

    I guess the crux of my question is, what's the damage threshold? I understand that under normal conditions, you should not go past the recommended. Still, generally, in the specification sheet, there would be a value quoted for the point at which damage will occur.

    I see damage values for everything except current draw when driving from a high state to ground, so sourcing current.

    I do appreciate TI would not guarantee any operation outside of the recommended values but damage values are usually given to let the engineer protect against magic smoke in the design Slight smile

    So can I infer that since TI doesn't quote a source current damage threshold that the chip is self-protected from destroying itself?

    Thanks for your time.

  • The short-circuit current is very large, so there certainly must be a limit.

    Nexperia specifies −64 mA. I suspect that somebody forgot the sign, and that footnote 2 is just a consequence of that.

  • So under measured short circuit, we see it limits to 64mA just the drive voltage drops to near zero. So it behaves like a CC source. But we wanted to check if that's an actual safety feature or not as the document explicitly states only the currents for normal conditions, and under limits, it notes its only for (V0> Vcc) etc
    We have also seen that Nexperia document that states 64mA and indeed, it seems to self-limit. Its all very seemly normal but also not documented lol

  • There is no such protection feature; the current becomes too large.

  • Interesting. So I wonder why it limits to 64mA then under short when we tested it today? I assume from your response that the buffer you mention is either the type used in the SN74LVTH125 or simular.
    Anyway, since there doesn't seem to be a damage value quoted, we will just have to design higher requirements or go with another chip for our product.

    Thanks for all the feedback.

  • So I wonder why it limits to 64mA then under short when we tested it today?

    Hi Anton,

    Because that's how MOSFETs work -- when you drive them into the saturation region, they act like constant current sources.

    Generally speaking, logic devices aren't designed to deliver power -- they are intended to drive signals between light capacitive loads. If you're after a low impedance source of power, I could recommend many better options.

  • Thanks for the offer, but that's ok. That would be outside the scope of the original question, we don't want a low-impedance driver, this question is purely about missing damage threshold information in the spec sheet. I understand how MOSFETs work, I was just suspicious that its saturation current would be so precisely 64mA which is what the documentation from Nexperia states in its specification sheet, but I couldn't find the same value in TI's.