TXB0104: Can TXB0104 be applied to SPI,GPIO and JTAG from 1.2V shift to 3.3V?

Hi,

Is this schematic design OK? Can you help to explian what are the restrictions to auto-bidirectional level shift?

See sections 8.3.2/3/5 of the TXB0104 datasheet.

In this schematic, you can use the TXU0304 (with the MISO signal on channel 4, it's even P2P).

Hi,

We want to use bi-directional Level Shift. Is the TXS0108E recommended be applied to SPI,GPIO and JTAG? Do the TXS0108E have many restrictions?

Many thanks.

Auto-bidirectional level shifters can be used only if you design the circuit around their limitations. It is your choice whether you want to do this.

The TXS has internal pull-up resistors, and outputs open-drain signals. This can work for SPI/GPIO/JTAG, if you do not need pull-down resistors, and if you keep the load and speed limits in mind.

Hi,

Can you  recommend the level shift of input is 3.3V, output is 1.2V that can support 50Mbps data rate?

No,there is not related to the above circuit.

1.I choose the SN74AVC2T244 as the level shift of input is 3.3V, output is 1.2V that can support 50MHz clock signal, is it OK?

2.In our board 50M clock signal LOW voltage is 0.5V,  is the SN74AVC2T244  recommended be applied?The max value of input LOW voltage is 0.8V in SN74AVC2T244 databook.

Hi,

1. What does SN74AXC1T45 device support high data-rate when signal is translated from 3.3 V to 1.2V?

2. What is the min value of low-level input voltage? In our board 50M clock signal LOW voltage is 0.5V,  is the SN74AXC1T45  recommended be applied?

Hi,

The max value of low-level input voltage is 0.8V at 3.3V, but what is the min value of AXC devices low-level input voltage? In our board 50M clock signal LOW voltage is 0.5V. Does the AXC devices recognize low level input?

Hi,

What does SN74AXC1T45 device support high data-rate when signal is translated from 3.3 V to 1.2V? The databook doesn't seem to specify that.