TXS0104E-Q1: TXS0104E-Q1

SteveB Balkaransingh

Prodigy 10 points

Part Number: TXS0104E-Q1
Other Parts Discussed in Thread: SN65MLVD203B, , TXS0104E, TXU0304-Q1

Tool/software:

Good afternoon;

our team is currently interfacing the TXS0104E-Q1 with SN65MLVD203B LVDS transceiver.

The challenge is the input threshold for the TXS0104E-Q1 is

VIL_MAX - 0.15V.
VIH_ MIN - 2.9V (VCC_A - 0.4V ASSUMING OUR VCC_A IS 3.3V THIS LEVEL WOULD BE 2.9V)

when interfacing the SN65MLVD203B the VIL and VIH levels are

VOL_MAX - 0.4V.
VOH_ MIN - 2.4V

Would TI be able to provide some explanation as to why the threshold levels are these levels for the TXS0104E and provide a solution for this application

30 days ago

0 Jack Guan 30 days ago

TI__Mastermind 20051 points

Hey Steve,

The VIL/ VIH requirements for the TXS devices are not firm because the device is a switch based translator (the input and output is passed through the device during a logic low state). For similar reason, this means that the device will not capable of buffering the input signals.

The VIL requirement of 0.15V in the datasheet will assure that the VOL of the TXS0104E will be below 0.4V with a input test condition of IOL=1mA. If the TXS receives a higher VIL, then a higher VOL value can be expected. It is explained further in this FAQ: https://e2e.ti.com/support/logic-group/logic/f/logic-forum/1041704/faq-why-are-the-txs01xx-vih-vil-specifications-so-stringent

Similar for the VIH requirement, it is not a firm requirement as any input voltage near/ higher then VCCA will result in an output high state via the internal 10kohm pullups.

Regards,

Jack

0 Srinivas Reddy Kandadi 24 days ago in reply to Jack Guan

Prodigy 20 points

Hey Jack,

Thank you for the response. I work with Steve (who has posted the above query).
Below is our exact scenario and i have expressed my understanding. Please help to confirm. I am worried up-translation might not work reliably.

After going through the app note, I think TXS0104E is ideal for down-translation and may not be recommended for up-translation.

0 Clemens Ladisch 23 days ago in reply to Srinivas Reddy Kandadi

Guru 257000 points

The TXS also can do up-translation, but then the one-shot is needed to speed up the rising edge.

Anyway, all your signals are unidirectional, so you can simply use a buffered translator like the TXU0304-Q1.

0 Srinivas Reddy Kandadi 23 days ago in reply to Clemens Ladisch

Prodigy 20 points

Clemens Ladisch: TXS has very stringent Vih and Vil requirements unlike standard. So, My question is for up-translation on A port, if my input is 1.35V and given that Vih requirement of TXS is 1.6V. Will TXS still Transmit High of 3.3V on the B port.

I think TXS can do up-translation as long as we meet the Vih min requirements.

TXS0104E: What's the valid input range for VIH if VCCA set to be 1.8V? - Logic forum - Logic - TI E2E support forums

0 Clemens Ladisch 23 days ago in reply to Srinivas Reddy Kandadi

Guru 257000 points

You are using the wrong V_OH value for your FPGA. 1.35 V can happen only with the specified maximum output current. When connected to the TXS input with a current of approximately zero, the actual V_OH will be 1.8 V. (See [FAQ] What is the output voltage (VOH or VOL) when the output current is X or the supply voltage is Y?)