Hi,
I am using VME buffers with part number SN74VMEH22501 for interfacing VME bus to kintex 7 FPGA. Please let me know if there is any standard desing or layout guidelines to be followed for implementing this.
Regards
Madhu
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Hi,
I am using VME buffers with part number SN74VMEH22501 for interfacing VME bus to kintex 7 FPGA. Please let me know if there is any standard desing or layout guidelines to be followed for implementing this.
Regards
Madhu