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Logic

Logic

Logic forum

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Texas Instruments (TI) Logic support forum is an extensive online knowledge base where millions of technical questions and solutions are available 24/7. You can search logic IC content or ask technical support questions on everything from voltage level translation and transceivers to standard logic gates and specialty logic devices. Find the right solution for your circuit design challenges by using our TI E2E™ support forums that are supported by thousands of contributing TI experts.
Frequent questions
  • [FAQ] How do I size my external RC components surrounding Auto-Bi Directional Translators to fit my System Requirements?

    Jack Guan
    Jack Guan
    Part Number: TXB0108 TXB0102 LSF0102 LSF0101 TXS0104E LSF0108 LSF0002 TXB0104 TXB0106 TXB0101 TXS0108E TXS0101 TXS0102 LSF0204 Tool/software: Auto Bi-Directional translators demand additional design considerations over other translators, such as external…
    • 4 months ago
    • Logic
    • Logic forum
  • [FAQ]: My simulation in ICS is very slow - how do I fix it?

    Malcolm Lyn
    Malcolm Lyn
    FAQ: TPLD > Current FAQ The two biggest causes of slow simulation are: Fast oscillators and switching signals Large simulation timescales (simulations that take 1+ seconds) If the simulation is utilizing a square wave with a period that is…
    • 5 months ago
    • Logic
    • Logic forum
  • [FAQ] Are TPLDs pin-to-pin compatible with competitor devices?

    Malcolm Lyn
    Malcolm Lyn
    FAQ: TPLD > Current FAQ Numerous TPLD products are either pin to pin or layout compatible with competing products. Our products utilize standard, JEDEC packaging standards.
    • 5 months ago
    • Logic
    • Logic forum
  • [FAQ] Can my TPLD be changed after programming?

    Malcolm Lyn
    Malcolm Lyn
    FAQ: TPLD > Current FAQ Once a TPLD is permanently programmed or “burned” through OTP, the design cannot be changed. If you wish to change your design after permanently programming an OTP part, a new, previously unprogrammed part must be used.
    • 5 months ago
    • Logic
    • Logic forum
  • [FAQ] How is TPLD programmed?

    Malcolm Lyn
    Malcolm Lyn
    FAQ: TPLD > Current FAQ TPLD is programmed through SPI communication enabled by the programmer firmware and InterConnect Studio (ICS). Each TPLD device uses 5 pins to program the device: 4 pins for SPI communication and 1 pin (GPI) that provides a specific…
    • 5 months ago
    • Logic
    • Logic forum
  • [FAQ] What do I use to program TPLD?

    Malcolm Lyn
    Malcolm Lyn
    Other Parts Discussed in Thread: TPLD1201 FAQ: TPLD > Current FAQ TPLD is programmed through our software tool, InterConnect Studio (ICS) , in combination with a TPLD programmer and EVM. TPLD programmers and EVMs can be found on the “Hardware development…
    • 5 months ago
    • Logic
    • Logic forum
  • [FAQ] Can I permanently program TPLD in-system or in production myself?

    Malcolm Lyn
    Malcolm Lyn
    FAQ: TPLD > Current FAQ No, current devices do not support in-system or inline programming (support is planned for future devices). For large scale production, we recommend you have TI program the devices before shipping. Customers can program devices…
    • 5 months ago
    • Logic
    • Logic forum
  • [FAQ] Can a third party program TPLD for me?

    Malcolm Lyn
    Malcolm Lyn
    FAQ: TPLD > Current FAQ Yes. Currently TI has enabled Dediprog to work as a third party for programming TPLD.
    • 5 months ago
    • Logic
    • Logic forum
  • [FAQ] Can TI program TPLD for me?

    Malcolm Lyn
    Malcolm Lyn
    FAQ: TPLD > Current FAQ Customers can order devices for production through InterConnect Studio (ICS). TI can program devices (at no additional cost!) before shipping with the submitted design if the order quantity is one reel or more (3000 units). …
    • 5 months ago
    • Logic
    • Logic forum
  • [FAQ] Does TPLD have memory? What kind of memory does TPLD use?

    Malcolm Lyn
    Malcolm Lyn
    FAQ: TPLD > Current FAQ TPLD uses Floating-Gate One-Time Programmable (OTP) technology to program its parts, as opposed to other Non-Volatile Memory techniques such as eFuses or AntiFuses, or Volatile Memory technologies such as EEPROM or RAM. Floating…
    • 5 months ago
    • Logic
    • Logic forum
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  • Not Answered

    [FAQ] Frequently Asked Questions: TPLD 0 Locked

    1178 views
    0 replies
    Started 5 months ago
    by Malcolm Lyn
  • Answered

    [FAQ] [H] Frequently Asked Questions: Logic and Voltage Translation 0 Locked

    36300 views
    1 reply
    Latest over 4 years ago
    by Michael J Schultis
  • Suggested Answer

    SN74AHC1G00-Q1: for VCC=1.8V 0

    21 views
    1 reply
    Latest 4 hours ago
    by Clemens Ladisch
  • Suggested Answer

    TXS0104V: Check VOL/IoL specifications 0

    27 views
    1 reply
    Latest 4 hours ago
    by Clemens Ladisch
  • Not Answered

    TPLD-PROGRAM: the evb damaged? 0

    42 views
    3 replies
    Latest 6 hours ago
    by Chen Alex1
  • Not Answered

    SN74LVC1G07: SN74LVC1G07YZVR BLR 0

    39 views
    2 replies
    Latest 7 hours ago
    by Daisuke Nomura
  • Suggested Answer

    LSF0102: LSF0102 Uart Reading error 0

    76 views
    4 replies
    Latest 15 hours ago
    by Marcelo Diniz
  • Suggested Answer

    SN74AHC1G08-Q1: SN74AHC1G08QDBVRQ1 0

    33 views
    1 reply
    Latest 15 hours ago
    by Ian Graham
  • Suggested Answer

    TPLD2001: GPIO input clamp behaviour 0

    36 views
    1 reply
    Latest 19 hours ago
    by Ian Graham
  • Answered

    TPLD801-Q1: Function check 0

    36 views
    1 reply
    Latest 19 hours ago
    by Ian Graham
  • Answered

    SN74AVC32T245: TI General Output Skew Guarantee 1ns 0

    49 views
    2 replies
    Latest 1 day ago
    by Moritz
  • Not Answered

    [FAQ] Can TXG support IEC-ESD for offboard connections 0 Locked

    40 views
    0 replies
    Started 1 day ago
    by Joshua Salinas
  • Not Answered

    [FAQ] How far apart can the two systems be with TXG I2C devices? 0 Locked

    37 views
    0 replies
    Started 1 day ago
    by Joshua Salinas
  • Not Answered

    [FAQ] Will TXG QFN packages support wettable flank? 0 Locked

    33 views
    0 replies
    Started 1 day ago
    by Joshua Salinas
  • Not Answered

    [FAQ] What is the leakage between 2 grounds? 0 Locked

    42 views
    0 replies
    Started 1 day ago
    by Joshua Salinas
  • Not Answered

    [FAQ] Can TXG be used as a simple level translator / buffer? 0 Locked

    49 views
    0 replies
    Started 1 day ago
    by Joshua Salinas
  • Suggested Answer

    CD4071B: CD4071BM96 HBM-EDS Rating 0

    33 views
    1 reply
    Latest 1 day ago
    by Nikki Dengel
  • Suggested Answer

    SN74LVC1G32-Q1: Pin capacitance and transition times 0

    38 views
    1 reply
    Latest 1 day ago
    by Nikki Dengel
  • Suggested Answer

    SN74LVC1G08-Q1: Pin capacitance and transition times 0

    40 views
    1 reply
    Latest 1 day ago
    by Nikki Dengel
  • Suggested Answer

    TXB0104-Q1: The risk and requirement for TXB0104QRUTRQ1 in TDM application 0

    118 views
    7 replies
    Latest 1 day ago
    by Jack Guan
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