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Logic

Logic

Logic forum

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Texas Instruments (TI) Logic support forum is an extensive online knowledge base where millions of technical questions and solutions are available 24/7. You can search logic IC content or ask technical support questions on everything from voltage level translation and transceivers to standard logic gates and specialty logic devices. Find the right solution for your circuit design challenges by using our TI E2E™ support forums that are supported by thousands of contributing TI experts.
Frequent questions
  • [FAQ] How do I size my external RC components surrounding Auto-Bi Directional Translators to fit my System Requirements?

    Jack Guan
    Jack Guan
    Part Number: TXB0108 TXB0102 LSF0102 LSF0101 TXS0104E LSF0108 LSF0002 TXB0104 TXB0106 TXB0101 TXS0108E TXS0101 TXS0102 LSF0204 Tool/software: Auto Bi-Directional translators demand additional design considerations over other translators, such as external…
    • 5 months ago
    • Logic
    • Logic forum
  • [FAQ]: My simulation in ICS is very slow - how do I fix it?

    Malcolm Lyn
    Malcolm Lyn
    FAQ: TPLD > Current FAQ The two biggest causes of slow simulation are: Fast oscillators and switching signals Large simulation timescales (simulations that take 1+ seconds) If the simulation is utilizing a square wave with a period that is…
    • 6 months ago
    • Logic
    • Logic forum
  • [FAQ] Are TPLDs pin-to-pin compatible with competitor devices?

    Malcolm Lyn
    Malcolm Lyn
    FAQ: TPLD > Current FAQ Numerous TPLD products are either pin to pin or layout compatible with competing products. Our products utilize standard, JEDEC packaging standards.
    • 6 months ago
    • Logic
    • Logic forum
  • [FAQ] Can my TPLD be changed after programming?

    Malcolm Lyn
    Malcolm Lyn
    FAQ: TPLD > Current FAQ Once a TPLD is permanently programmed or “burned” through OTP, the design cannot be changed. If you wish to change your design after permanently programming an OTP part, a new, previously unprogrammed part must be used.
    • 6 months ago
    • Logic
    • Logic forum
  • [FAQ] How is TPLD programmed?

    Malcolm Lyn
    Malcolm Lyn
    FAQ: TPLD > Current FAQ TPLD is programmed through SPI communication enabled by the programmer firmware and InterConnect Studio (ICS). Each TPLD device uses 5 pins to program the device: 4 pins for SPI communication and 1 pin (GPI) that provides a specific…
    • 6 months ago
    • Logic
    • Logic forum
  • [FAQ] What do I use to program TPLD?

    Malcolm Lyn
    Malcolm Lyn
    Other Parts Discussed in Thread: TPLD1201 FAQ: TPLD > Current FAQ TPLD is programmed through our software tool, InterConnect Studio (ICS) , in combination with a TPLD programmer and EVM. TPLD programmers and EVMs can be found on the “Hardware development…
    • 6 months ago
    • Logic
    • Logic forum
  • [FAQ] Can I permanently program TPLD in-system or in production myself?

    Malcolm Lyn
    Malcolm Lyn
    FAQ: TPLD > Current FAQ No, current devices do not support in-system or inline programming (support is planned for future devices). For large scale production, we recommend you have TI program the devices before shipping. Customers can program devices…
    • 6 months ago
    • Logic
    • Logic forum
  • [FAQ] Can a third party program TPLD for me?

    Malcolm Lyn
    Malcolm Lyn
    FAQ: TPLD > Current FAQ Yes. Currently TI has enabled Dediprog to work as a third party for programming TPLD.
    • 6 months ago
    • Logic
    • Logic forum
  • [FAQ] Can TI program TPLD for me?

    Malcolm Lyn
    Malcolm Lyn
    FAQ: TPLD > Current FAQ Customers can order devices for production through InterConnect Studio (ICS). TI can program devices (at no additional cost!) before shipping with the submitted design if the order quantity is one reel or more (3000 units). …
    • 6 months ago
    • Logic
    • Logic forum
  • [FAQ] Does TPLD have memory? What kind of memory does TPLD use?

    Malcolm Lyn
    Malcolm Lyn
    FAQ: TPLD > Current FAQ TPLD uses Floating-Gate One-Time Programmable (OTP) technology to program its parts, as opposed to other Non-Volatile Memory techniques such as eFuses or AntiFuses, or Volatile Memory technologies such as EEPROM or RAM. Floating…
    • 6 months ago
    • Logic
    • Logic forum
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View FAQ threads
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  • Answered

    LSF0102: VIL voltage level 0 Locked

    366 views
    6 replies
    Latest over 3 years ago
    by Clemens Ladisch
  • Answered

    SN74AXC4T774: Level Translation with Multi-Slave SPI 0 Locked

    732 views
    1 reply
    Latest over 3 years ago
    by Clemens Ladisch
  • Answered

    TXS02612: SD card cannot be recognized at CLK50MHz 0 Locked

    417 views
    2 replies
    Latest over 3 years ago
    by Shinichi Inoue
  • Answered

    Lack of data sheet XISO6763FQDWRQ1 0 Locked

    316 views
    3 replies
    Latest over 3 years ago
    by Marcin Kulczynski
  • Suggested Answer

    CD74HCT240: Difference between output drive between CD74HCT240M and SN74HCT240D 0 Locked

    443 views
    6 replies
    Latest over 3 years ago
    by Clemens Ladisch
  • Suggested Answer

    CD4504B-EP: Can CD4504B-EP convert 15Vin to 5Vout? 0 Locked

    483 views
    1 reply
    Latest over 3 years ago
    by Clemens Ladisch
  • Suggested Answer

    SN74ABT244A: G4 difference 0 Locked

    272 views
    1 reply
    Latest over 3 years ago
    by Owen Westfall
  • Answered

    LSF0102: LSF0102 (Vref_B= 3.3V and Vref_A= Hi-Z) 0 Locked

    633 views
    3 replies
    Latest over 3 years ago
    by Clemens Ladisch
  • Answered

    SN74AHC04: SN74AHC04PWR vs SN74AHC04PWR-M 0 Locked

    263 views
    1 reply
    Latest over 3 years ago
    by Clemens Ladisch
  • Suggested Answer

    SN74LVC1G74: Initial output stage after powerig up 0 Locked

    223 views
    1 reply
    Latest over 3 years ago
    by Clemens Ladisch
  • Suggested Answer

    SN74LVC1G07-Q1: how to achieve wire-or logic? 0 Locked

    595 views
    6 replies
    Latest over 3 years ago
    by Clemens Ladisch
  • Answered

    TXU0104: How do you adjust C_comp as required in the IBIS model? 0 Locked

    800 views
    3 replies
    Latest over 3 years ago
    by Karan Kotadia
  • Answered

    SN74HC4020: About REACH 0 Locked

    274 views
    1 reply
    Latest over 3 years ago
    by Owen Westfall
  • Suggested Answer

    SN74HC244: Absolute max rating for input and output, IoL and IoH 0 Locked

    513 views
    1 reply
    Latest over 3 years ago
    by Clemens Ladisch
  • Suggested Answer

    SN74LVC244A: Δt/Δv Input transition rise or fall rate 0 Locked

    422 views
    1 reply
    Latest over 3 years ago
    by Clemens Ladisch
  • Suggested Answer

    SN74BCT8244A: Is this the latest and greatest to recommend for IEEE 1149.1 JTAG buffering? 0 Locked

    409 views
    2 replies
    Latest over 3 years ago
    by Emrys Maier
  • Answered

    TXS0101: Don't you have PSPICE model instead of HSPICE 0 Locked

    237 views
    1 reply
    Latest over 3 years ago
    by Michael Ikwuyum
  • Suggested Answer

    SN74LVC1G126IDCKREP: Difference between SN74LVC1G126DCKR 0 Locked

    213 views
    2 replies
    Latest over 3 years ago
    by Sebastian Muriel
  • Answered

    CY74FCT162646T: Equivalence between CY74FCT162646CTPVC and 74FCT162646CTPVC 0 Locked

    330 views
    2 replies
    Latest over 3 years ago
    by franziskus
  • Answered

    SN74AVC16245: unused input and output pin 0 Locked

    387 views
    3 replies
    Latest over 3 years ago
    by Clemens Ladisch
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