SN74LVC2G74: Input transition rise or fall rate impact on output

Davide Bellazzi

Part Number: SN74LVC2G74

Hello!

SN74LVC2G74 datasheet specifies a strict maximum "Input transition rise or fall rate".

In the system I'm analysing these values are not respected on the CLK pin (transition time is at least ten times higher), however no issues are detected at the output when it switches.

So, can I rely on this behaviour, even though the "Input transition rise or fall rate" is not respected, or could I experience any problems in some cases?

Thanks

Davide

over 3 years ago

0 Dylan Hubbard over 3 years ago

TI__Mastermind 42670 points

Hey David,

No this will not always be the case. See here for issues that can arise: https://e2e.ti.com/support/logic/f/151/t/737694

Oscillations don't impact d flip-flops as much do to the nature of operation, but it is still possible to have erroneous data at the output due to the internal buffer for the Clk pin oscillating during a time in which the data input is transitioned.

0 Davide Bellazzi over 3 years ago in reply to Dylan Hubbard

Prodigy 20 points

Thanks!

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SN74LVC2G74: Input transition rise or fall rate impact on output